Lines Matching refs:WREG32_P
134 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in rv770_gfx_clock_gating_enable()
136 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in rv770_gfx_clock_gating_enable()
137 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); in rv770_gfx_clock_gating_enable()
138 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); in rv770_gfx_clock_gating_enable()
177 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in rv770_restore_cgcg()
182 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in rv770_start_dpm()
184 WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF); in rv770_start_dpm()
186 WREG32_P(GENERAL_PWRMGT, GLOBAL_PWRMGT_EN, ~GLOBAL_PWRMGT_EN); in rv770_start_dpm()
198 WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); in rv770_stop_dpm()
200 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in rv770_stop_dpm()
202 WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF); in rv770_stop_dpm()
217 WREG32_P(GENERAL_PWRMGT, 0, ~THERMAL_PROTECTION_DIS); in rv770_enable_thermal_protection()
219 WREG32_P(GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, ~THERMAL_PROTECTION_DIS); in rv770_enable_thermal_protection()
224 WREG32_P(GENERAL_PWRMGT, STATIC_PM_EN, ~STATIC_PM_EN); in rv770_enable_acpi_pm()
775 WREG32_P(GENERAL_PWRMGT, BACKBIAS_PAD_EN, ~BACKBIAS_PAD_EN); in rv770_enable_backbias()
777 WREG32_P(GENERAL_PWRMGT, 0, ~(BACKBIAS_VALUE | BACKBIAS_PAD_EN)); in rv770_enable_backbias()
787 WREG32_P(GENERAL_PWRMGT, DYN_SPREAD_SPECTRUM_EN, ~DYN_SPREAD_SPECTRUM_EN); in rv770_enable_spread_spectrum()
794 WREG32_P(CG_SPLL_SPREAD_SPECTRUM, 0, ~SSEN); in rv770_enable_spread_spectrum()
796 WREG32_P(GENERAL_PWRMGT, 0, ~DYN_SPREAD_SPECTRUM_EN); in rv770_enable_spread_spectrum()
798 WREG32_P(CG_MPLL_SPREAD_SPECTRUM, 0, ~SSEN); in rv770_enable_spread_spectrum()
842 WREG32_P(CG_GIT, CG_GICST(R600_GICST_DFLT), ~CG_GICST_MASK); in rv770_program_git()
854 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in rv770_program_tp()
856 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in rv770_program_tp()
858 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE); in rv770_program_tp()
860 WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE); in rv770_program_tp()
875 WREG32_P(SPLL_CNTL_MODE, SPLL_DIV_SYNC, ~SPLL_DIV_SYNC); in rv770_program_engine_speed_parameters()
1337 WREG32_P(GENERAL_PWRMGT, VOLT_PWRMGT_EN, ~VOLT_PWRMGT_EN); in rv770_enable_voltage_control()
1339 WREG32_P(GENERAL_PWRMGT, 0, ~VOLT_PWRMGT_EN); in rv770_enable_voltage_control()
1366 WREG32_P(GENERAL_PWRMGT, ENABLE_GEN2PCIE, ~ENABLE_GEN2PCIE); in rv770_enable_dynamic_pcie_gen2()
1368 WREG32_P(GENERAL_PWRMGT, 0, ~ENABLE_GEN2PCIE); in rv770_enable_dynamic_pcie_gen2()
1587 WREG32_P(GENERAL_PWRMGT, SW_SMIO_INDEX(0), ~SW_SMIO_INDEX_MASK); in rv770_reset_smio_status()
1633 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
1634 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
1635 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
1639 WREG32_P(SMC_MSG, HOST_SMC_MSG(PPSMC_MSG_SwitchToMinimumPower),
1652 WREG32_P(SMC_MSG, HOST_SMC_MSG(PPSMC_MSG_ResumeFromMinimumPower),
1664 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN);
1842 WREG32_P(CG_THERMAL_CTRL, DPM_EVENT_SRC(dpm_event_src), ~DPM_EVENT_SRC_MASK); in rv770_set_dpm_event_sources()
1844 WREG32_P(GENERAL_PWRMGT, 0, ~THERMAL_PROTECTION_DIS); in rv770_set_dpm_event_sources()
1846 WREG32_P(GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, ~THERMAL_PROTECTION_DIS); in rv770_set_dpm_event_sources()
1884 WREG32_P(CG_THERMAL_INT, DIG_THERM_INTH(high_temp / 1000), ~DIG_THERM_INTH_MASK); in rv770_set_thermal_temperature_range()
1885 WREG32_P(CG_THERMAL_INT, DIG_THERM_INTL(low_temp / 1000), ~DIG_THERM_INTL_MASK); in rv770_set_thermal_temperature_range()
1886 WREG32_P(CG_THERMAL_CTRL, DIG_THERM_DPM(high_temp / 1000), ~DIG_THERM_DPM_MASK); in rv770_set_thermal_temperature_range()