126 	u32 mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl;  in rv730_populate_mclk_value()  local
150 		mpll_func_cntl |= MPLL_DIVEN;  in rv730_populate_mclk_value()
152 		mpll_func_cntl &= ~MPLL_DIVEN;  in rv730_populate_mclk_value()
154 	mpll_func_cntl &= ~(MPLL_REF_DIV_MASK | MPLL_HILEN_MASK | MPLL_LOLEN_MASK);  in rv730_populate_mclk_value()
155 	mpll_func_cntl |= MPLL_REF_DIV(dividers.ref_div);  in rv730_populate_mclk_value()
156 	mpll_func_cntl |= MPLL_HILEN((dividers.post_div >> 4) & 0xf);  in rv730_populate_mclk_value()
157 	mpll_func_cntl |= MPLL_LOLEN(dividers.post_div & 0xf);  in rv730_populate_mclk_value()
189 	mclk->mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl);  in rv730_populate_mclk_value()
217 	pi->clk_regs.rv730.mpll_func_cntl =  in rv730_read_clock_registers()
233 	u32 mpll_func_cntl = 0;  in rv730_populate_smc_acpi_state()  local
258 	mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl;  in rv730_populate_smc_acpi_state()
262 	mpll_func_cntl |= MPLL_RESET | MPLL_BYPASS_EN;  in rv730_populate_smc_acpi_state()
263 	mpll_func_cntl &= ~MPLL_SLEEP;  in rv730_populate_smc_acpi_state()
297 	table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl);  in rv730_populate_smc_acpi_state()
328 		cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl);  in rv730_populate_smc_initial_state()