Lines Matching refs:dividers

45 	struct atom_clock_dividers dividers;  in rv730_populate_sclk_value()  local
58 engine_clock, false, &dividers); in rv730_populate_sclk_value()
62 reference_divider = 1 + dividers.ref_div; in rv730_populate_sclk_value()
64 if (dividers.enable_post_div) in rv730_populate_sclk_value()
65 post_divider = ((dividers.post_div >> 4) & 0xf) + in rv730_populate_sclk_value()
66 (dividers.post_div & 0xf) + 2; in rv730_populate_sclk_value()
75 if (dividers.enable_post_div) in rv730_populate_sclk_value()
80 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv730_populate_sclk_value()
81 spll_func_cntl |= SPLL_HILEN((dividers.post_div >> 4) & 0xf); in rv730_populate_sclk_value()
82 spll_func_cntl |= SPLL_LOLEN(dividers.post_div & 0xf); in rv730_populate_sclk_value()
131 struct atom_clock_dividers dividers; in rv730_populate_mclk_value() local
136 memory_clock, false, &dividers); in rv730_populate_mclk_value()
140 reference_divider = dividers.ref_div + 1; in rv730_populate_mclk_value()
142 if (dividers.enable_post_div) in rv730_populate_mclk_value()
143 post_divider = ((dividers.post_div >> 4) & 0xf) + in rv730_populate_mclk_value()
144 (dividers.post_div & 0xf) + 2; in rv730_populate_mclk_value()
149 if (dividers.enable_post_div) in rv730_populate_mclk_value()
155 mpll_func_cntl |= MPLL_REF_DIV(dividers.ref_div); in rv730_populate_mclk_value()
156 mpll_func_cntl |= MPLL_HILEN((dividers.post_div >> 4) & 0xf); in rv730_populate_mclk_value()
157 mpll_func_cntl |= MPLL_LOLEN(dividers.post_div & 0xf); in rv730_populate_mclk_value()
160 mpll_func_cntl_3 |= MPLL_FB_DIV(dividers.fb_div); in rv730_populate_mclk_value()
161 if (dividers.enable_dithen) in rv730_populate_mclk_value()
174 u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000); in rv730_populate_mclk_value()