522 	WREG32_MC(R_000100_MC_PT0_CNTL, tmp);  in rs600_gart_tlb_flush()
526 	WREG32_MC(R_000100_MC_PT0_CNTL, tmp);  in rs600_gart_tlb_flush()
530 	WREG32_MC(R_000100_MC_PT0_CNTL, tmp);  in rs600_gart_tlb_flush()
567 	WREG32_MC(R_000100_MC_PT0_CNTL,  in rs600_gart_enable()
572 		WREG32_MC(R_00016C_MC_PT0_CLIENT0_CNTL + i,  in rs600_gart_enable()
583 	WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL,  in rs600_gart_enable()
589 		WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL + i, 0);  in rs600_gart_enable()
592 	WREG32_MC(R_00012C_MC_PT0_CONTEXT0_FLAT_BASE_ADDR,  in rs600_gart_enable()
594 	WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start);  in rs600_gart_enable()
595 	WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end);  in rs600_gart_enable()
596 	WREG32_MC(R_00011C_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR, 0);  in rs600_gart_enable()
599 	WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start);  in rs600_gart_enable()
600 	WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end);  in rs600_gart_enable()
604 	WREG32_MC(R_000100_MC_PT0_CNTL, (tmp | S_000100_ENABLE_PT(1)));  in rs600_gart_enable()
606 	WREG32_MC(R_000009_MC_CNTL1, (tmp | S_000009_ENABLE_PAGE_TABLES(1)));  in rs600_gart_enable()
620 	WREG32_MC(R_000100_MC_PT0_CNTL, 0);  in rs600_gart_disable()
622 	WREG32_MC(R_000009_MC_CNTL1, tmp & C_000009_ENABLE_PAGE_TABLES);  in rs600_gart_disable()
967 	WREG32_MC(R_000005_MC_AGP_LOCATION, 0x0FFFFFFF);  in rs600_mc_program()
968 	WREG32_MC(R_000006_AGP_BASE, 0);  in rs600_mc_program()
969 	WREG32_MC(R_000007_AGP_BASE_2, 0);  in rs600_mc_program()
971 	WREG32_MC(R_000004_MC_FB_LOCATION,  in rs600_mc_program()