398 	WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);  in radeon_legacy_set_engine_clock()
402 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_engine_clock()
408 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
414 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
421 	WREG32_PLL(RADEON_M_SPLL_REF_FB_DIV, tmp);  in radeon_legacy_set_engine_clock()
430 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
434 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
440 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);  in radeon_legacy_set_engine_clock()
461 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_engine_clock()
467 	WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);  in radeon_legacy_set_engine_clock()
492 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
515 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
520 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
525 				WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
541 				WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
550 				WREG32_PLL(R300_SCLK_CNTL2, tmp);  in radeon_legacy_set_clock_gating()
568 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
573 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
578 				WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
594 				WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
599 				WREG32_PLL(RADEON_MCLK_MISC, tmp);  in radeon_legacy_set_clock_gating()
631 				WREG32_PLL(RADEON_MCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
636 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
643 				WREG32_PLL(R300_SCLK_CNTL2, tmp);  in radeon_legacy_set_clock_gating()
654 			WREG32_PLL(RADEON_CLK_PWRMGT_CNTL, tmp);  in radeon_legacy_set_clock_gating()
659 			WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);  in radeon_legacy_set_clock_gating()
683 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
699 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
711 				WREG32_PLL(RADEON_PLL_PWRMGT_CNTL, tmp);  in radeon_legacy_set_clock_gating()
725 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
732 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
746 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
758 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
762 			WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
768 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
785 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
791 			WREG32_PLL(R300_SCLK_CNTL2, tmp);  in radeon_legacy_set_clock_gating()
802 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
806 			WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
813 			WREG32_PLL(RADEON_MCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
819 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()
836 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
863 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
873 				WREG32_PLL(R300_SCLK_CNTL2, tmp);  in radeon_legacy_set_clock_gating()
881 				WREG32_PLL(RADEON_MCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
890 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);  in radeon_legacy_set_clock_gating()
903 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);  in radeon_legacy_set_clock_gating()
909 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);  in radeon_legacy_set_clock_gating()