41 	fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV);  in radeon_legacy_get_engine_clock()
47 	    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;  in radeon_legacy_get_engine_clock()
54 	post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK;  in radeon_legacy_get_engine_clock()
71 	fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV);  in radeon_legacy_get_memory_clock()
77 	    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;  in radeon_legacy_get_memory_clock()
84 	post_div = RREG32_PLL(RADEON_MCLK_CNTL) & 0x7;  in radeon_legacy_get_memory_clock()
118 	p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;  in radeon_read_clocks_OF()
148 		RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &  in radeon_read_clocks_OF()
196 				u32 tmp = RREG32_PLL(RADEON_PPLL_REF_DIV);  in radeon_get_clock_info()
212 					RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &  in radeon_get_clock_info()
238 			    RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;  in radeon_get_clock_info()
264 			    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &  in radeon_get_clock_info()
356 		    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &  in calc_eng_mem_clock()
396 	tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL);  in radeon_legacy_set_engine_clock()
400 	tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_engine_clock()
406 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
412 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
418 	tmp = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV);  in radeon_legacy_set_engine_clock()
424 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
432 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
438 	tmp = RREG32_PLL(RADEON_SPLL_CNTL);  in radeon_legacy_set_engine_clock()
444 	tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_engine_clock()
465 	tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL);  in radeon_legacy_set_engine_clock()
478 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
496 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
517 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
522 				tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
527 				tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
543 				tmp = RREG32_PLL(R300_SCLK_CNTL2);  in radeon_legacy_set_clock_gating()
552 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
570 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
575 				tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
580 				tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
596 				tmp = RREG32_PLL(RADEON_MCLK_MISC);  in radeon_legacy_set_clock_gating()
601 				tmp = RREG32_PLL(RADEON_MCLK_CNTL);  in radeon_legacy_set_clock_gating()
616 					tmp = RREG32_PLL(RADEON_MCLK_CNTL);  in radeon_legacy_set_clock_gating()
633 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
639 				tmp = RREG32_PLL(R300_SCLK_CNTL2);  in radeon_legacy_set_clock_gating()
646 			tmp = RREG32_PLL(RADEON_CLK_PWRMGT_CNTL);  in radeon_legacy_set_clock_gating()
657 			tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL);  in radeon_legacy_set_clock_gating()
665 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
688 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
709 				tmp = RREG32_PLL(RADEON_PLL_PWRMGT_CNTL);  in radeon_legacy_set_clock_gating()
716 			tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
728 			tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
738 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
749 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
760 			tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
764 			tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
770 			tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
788 			tmp = RREG32_PLL(R300_SCLK_CNTL2);  in radeon_legacy_set_clock_gating()
793 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
804 			tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
808 			tmp = RREG32_PLL(RADEON_MCLK_CNTL);  in radeon_legacy_set_clock_gating()
815 			tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()
821 			tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
838 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
869 				tmp = RREG32_PLL(R300_SCLK_CNTL2);  in radeon_legacy_set_clock_gating()
878 				tmp = RREG32_PLL(RADEON_MCLK_CNTL);  in radeon_legacy_set_clock_gating()
888 				tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);  in radeon_legacy_set_clock_gating()
894 			tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);  in radeon_legacy_set_clock_gating()
906 			tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);  in radeon_legacy_set_clock_gating()