54 	post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK;  in radeon_legacy_get_engine_clock()
400 	tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_engine_clock()
402 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_engine_clock()
444 	tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_engine_clock()
461 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_engine_clock()
478 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
492 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
496 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
515 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
552 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
568 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
633 				tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
636 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
665 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
683 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
738 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
746 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
749 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
758 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
793 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
802 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()
838 			tmp = RREG32_PLL(RADEON_SCLK_CNTL);  in radeon_legacy_set_clock_gating()
863 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);  in radeon_legacy_set_clock_gating()