Lines Matching refs:allowed_mclk_table
3444 struct radeon_clock_voltage_dependency_table *allowed_mclk_table = in ci_setup_default_dpm_tables() local
3454 if (allowed_mclk_table == NULL) in ci_setup_default_dpm_tables()
3456 if (allowed_mclk_table->count < 1) in ci_setup_default_dpm_tables()
3491 for (i = 0; i < allowed_mclk_table->count; i++) { in ci_setup_default_dpm_tables()
3494 allowed_mclk_table->entries[i].clk)) { in ci_setup_default_dpm_tables()
3496 allowed_mclk_table->entries[i].clk; in ci_setup_default_dpm_tables()
3512 allowed_mclk_table = &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; in ci_setup_default_dpm_tables()
3513 if (allowed_mclk_table) { in ci_setup_default_dpm_tables()
3514 for (i = 0; i < allowed_mclk_table->count; i++) { in ci_setup_default_dpm_tables()
3516 allowed_mclk_table->entries[i].v; in ci_setup_default_dpm_tables()
3519 pi->dpm_table.vddci_table.count = allowed_mclk_table->count; in ci_setup_default_dpm_tables()
3522 allowed_mclk_table = &rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk; in ci_setup_default_dpm_tables()
3523 if (allowed_mclk_table) { in ci_setup_default_dpm_tables()
3524 for (i = 0; i < allowed_mclk_table->count; i++) { in ci_setup_default_dpm_tables()
3526 allowed_mclk_table->entries[i].v; in ci_setup_default_dpm_tables()
3529 pi->dpm_table.mvdd_table.count = allowed_mclk_table->count; in ci_setup_default_dpm_tables()