598 				WREG32_SMC(config_regs->offset, data);  in ci_program_pt_config_registers()
888 	WREG32_SMC(CG_THERMAL_INT, tmp);  in ci_thermal_set_temperature_range()
895 	WREG32_SMC(CG_THERMAL_CTRL, tmp);  in ci_thermal_set_temperature_range()
912 		WREG32_SMC(CG_THERMAL_INT, thermal_int);  in ci_thermal_enable_alert()
921 		WREG32_SMC(CG_THERMAL_INT, thermal_int);  in ci_thermal_enable_alert()
948 	WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_fan_ctrl_set_static_mode()
952 	WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_fan_ctrl_set_static_mode()
1126 	WREG32_SMC(CG_FDO_CTRL0, tmp);  in ci_fan_ctrl_set_fan_speed_percent()
1203 	WREG32_SMC(CG_TACH_CTRL, tmp);
1219 		WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_fan_ctrl_set_default_mode()
1223 		WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_fan_ctrl_set_default_mode()
1243 		WREG32_SMC(CG_TACH_CTRL, tmp);  in ci_thermal_initialize()
1248 	WREG32_SMC(CG_FDO_CTRL2, tmp);  in ci_thermal_initialize()
1411 		WREG32_SMC(CG_THERMAL_CTRL, tmp);  in ci_set_dpm_event_sources()
1419 		WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_set_dpm_event_sources()
1423 		WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_set_dpm_event_sources()
1497 			WREG32_SMC(LCAC_MC0_CNTL, 0x05);  in ci_enable_sclk_mclk_dpm()
1498 			WREG32_SMC(LCAC_MC1_CNTL, 0x05);  in ci_enable_sclk_mclk_dpm()
1499 			WREG32_SMC(LCAC_CPL_CNTL, 0x100005);  in ci_enable_sclk_mclk_dpm()
1503 			WREG32_SMC(LCAC_MC0_CNTL, 0x400005);  in ci_enable_sclk_mclk_dpm()
1504 			WREG32_SMC(LCAC_MC1_CNTL, 0x400005);  in ci_enable_sclk_mclk_dpm()
1505 			WREG32_SMC(LCAC_CPL_CNTL, 0x500005);  in ci_enable_sclk_mclk_dpm()
1533 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_start_dpm()
1537 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_start_dpm()
1594 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_stop_dpm()
1598 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_stop_dpm()
1625 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_enable_sclk_control()
1911 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_thermal_protection()
1920 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_acpi_power_management()
1997 	WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);  in ci_program_display_gap()
2008 	WREG32_SMC(CG_DISPLAY_GAP_CNTL2, tmp);  in ci_program_display_gap()
2026 			WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_spread_spectrum()
2031 		WREG32_SMC(CG_SPLL_SPREAD_SPECTRUM, tmp);  in ci_enable_spread_spectrum()
2035 		WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_spread_spectrum()
2041 	WREG32_SMC(CG_SSP, (SSTU(R600_SSTU_DFLT) | SST(R600_SST_DFLT)));  in ci_program_sstp()
2052 	WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);  in ci_enable_display_gap()
2061 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_program_vc()
2063 	WREG32_SMC(CG_FTV_0, CISLANDS_VRC_DFLT0);  in ci_program_vc()
2064 	WREG32_SMC(CG_FTV_1, CISLANDS_VRC_DFLT1);  in ci_program_vc()
2065 	WREG32_SMC(CG_FTV_2, CISLANDS_VRC_DFLT2);  in ci_program_vc()
2066 	WREG32_SMC(CG_FTV_3, CISLANDS_VRC_DFLT3);  in ci_program_vc()
2067 	WREG32_SMC(CG_FTV_4, CISLANDS_VRC_DFLT4);  in ci_program_vc()
2068 	WREG32_SMC(CG_FTV_5, CISLANDS_VRC_DFLT5);  in ci_program_vc()
2069 	WREG32_SMC(CG_FTV_6, CISLANDS_VRC_DFLT6);  in ci_program_vc()
2070 	WREG32_SMC(CG_FTV_7, CISLANDS_VRC_DFLT7);  in ci_program_vc()
2079 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);  in ci_clear_vc()
2081 	WREG32_SMC(CG_FTV_0, 0);  in ci_clear_vc()
2082 	WREG32_SMC(CG_FTV_1, 0);  in ci_clear_vc()
2083 	WREG32_SMC(CG_FTV_2, 0);  in ci_clear_vc()
2084 	WREG32_SMC(CG_FTV_3, 0);  in ci_clear_vc()
2085 	WREG32_SMC(CG_FTV_4, 0);  in ci_clear_vc()
2086 	WREG32_SMC(CG_FTV_5, 0);  in ci_clear_vc()
2087 	WREG32_SMC(CG_FTV_6, 0);  in ci_clear_vc()
2088 	WREG32_SMC(CG_FTV_7, 0);  in ci_clear_vc()
2100 	WREG32_SMC(SMC_SYSCON_MISC_CNTL, 1);  in ci_upload_firmware()
3583 		WREG32_SMC(CG_ULV_PARAMETER, ulv->cg_ulv_parameter);  in ci_init_smc_table()
4091 		WREG32_SMC(DPM_TABLE_475, tmp);  in ci_update_uvd_dpm()
4129 			WREG32_SMC(DPM_TABLE_475, tmp);  in ci_update_vce_dpm()
4159 		WREG32_SMC(DPM_TABLE_475, tmp);
4792 	WREG32_SMC(GENERAL_PWRMGT, tmp);  in ci_enable_voltage_control()
5868 		WREG32_SMC(CNB_PWRMGT_CNTL, tmp);  in ci_dpm_init()