Lines Matching refs:dss
65 #define REG_GET(dss, idx, start, end) \ argument
66 FLD_GET(dss_read_reg(dss, idx), start, end)
68 #define REG_FLD_MOD(dss, idx, val, start, end) \ argument
69 dss_write_reg(dss, idx, \
70 FLD_MOD(dss_read_reg(dss, idx), val, start, end))
73 int (*dpi_select_source)(struct dss_device *dss, int port,
75 int (*select_lcd_source)(struct dss_device *dss,
105 static inline void dss_write_reg(struct dss_device *dss, in dss_write_reg() argument
108 __raw_writel(val, dss->base + idx.idx); in dss_write_reg()
111 static inline u32 dss_read_reg(struct dss_device *dss, const struct dss_reg idx) in dss_read_reg() argument
113 return __raw_readl(dss->base + idx.idx); in dss_read_reg()
116 #define SR(dss, reg) \ argument
117 dss->ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(dss, DSS_##reg)
118 #define RR(dss, reg) \ argument
119 dss_write_reg(dss, DSS_##reg, dss->ctx[(DSS_##reg).idx / sizeof(u32)])
121 static void dss_save_context(struct dss_device *dss) in dss_save_context() argument
125 SR(dss, CONTROL); in dss_save_context()
127 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) { in dss_save_context()
128 SR(dss, SDI_CONTROL); in dss_save_context()
129 SR(dss, PLL_CONTROL); in dss_save_context()
132 dss->ctx_valid = true; in dss_save_context()
137 static void dss_restore_context(struct dss_device *dss) in dss_restore_context() argument
141 if (!dss->ctx_valid) in dss_restore_context()
144 RR(dss, CONTROL); in dss_restore_context()
146 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) { in dss_restore_context()
147 RR(dss, SDI_CONTROL); in dss_restore_context()
148 RR(dss, PLL_CONTROL); in dss_restore_context()
162 if (!pll->dss->syscon_pll_ctrl) in dss_ctrl_pll_enable()
182 regmap_update_bits(pll->dss->syscon_pll_ctrl, in dss_ctrl_pll_enable()
183 pll->dss->syscon_pll_ctrl_offset, in dss_ctrl_pll_enable()
187 static int dss_ctrl_pll_set_control_mux(struct dss_device *dss, in dss_ctrl_pll_set_control_mux() argument
193 if (!dss->syscon_pll_ctrl) in dss_ctrl_pll_set_control_mux()
248 regmap_update_bits(dss->syscon_pll_ctrl, dss->syscon_pll_ctrl_offset, in dss_ctrl_pll_set_control_mux()
254 void dss_sdi_init(struct dss_device *dss, int datapairs) in dss_sdi_init() argument
260 l = dss_read_reg(dss, DSS_SDI_CONTROL); in dss_sdi_init()
264 dss_write_reg(dss, DSS_SDI_CONTROL, l); in dss_sdi_init()
266 l = dss_read_reg(dss, DSS_PLL_CONTROL); in dss_sdi_init()
270 dss_write_reg(dss, DSS_PLL_CONTROL, l); in dss_sdi_init()
273 int dss_sdi_enable(struct dss_device *dss) in dss_sdi_enable() argument
277 dispc_pck_free_enable(dss->dispc, 1); in dss_sdi_enable()
280 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 1, 18, 18); /* SDI_PLL_SYSRESET */ in dss_sdi_enable()
284 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 1, 28, 28); /* SDI_PLL_GOBIT */ in dss_sdi_enable()
288 while (dss_read_reg(dss, DSS_SDI_STATUS) & (1 << 6)) { in dss_sdi_enable()
296 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 0, 28, 28); in dss_sdi_enable()
300 while (!(dss_read_reg(dss, DSS_SDI_STATUS) & (1 << 5))) { in dss_sdi_enable()
307 dispc_lcd_enable_signal(dss->dispc, 1); in dss_sdi_enable()
311 while (!(dss_read_reg(dss, DSS_SDI_STATUS) & (1 << 2))) { in dss_sdi_enable()
321 dispc_lcd_enable_signal(dss->dispc, 0); in dss_sdi_enable()
324 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */ in dss_sdi_enable()
326 dispc_pck_free_enable(dss->dispc, 0); in dss_sdi_enable()
331 void dss_sdi_disable(struct dss_device *dss) in dss_sdi_disable() argument
333 dispc_lcd_enable_signal(dss->dispc, 0); in dss_sdi_disable()
335 dispc_pck_free_enable(dss->dispc, 0); in dss_sdi_disable()
338 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */ in dss_sdi_disable()
346 static void dss_dump_clocks(struct dss_device *dss, struct seq_file *s) in dss_dump_clocks() argument
351 if (dss_runtime_get(dss)) in dss_dump_clocks()
357 fclk_rate = clk_get_rate(dss->dss_clk); in dss_dump_clocks()
363 dss_runtime_put(dss); in dss_dump_clocks()
368 struct dss_device *dss = s->private; in dss_dump_regs() local
370 #define DUMPREG(dss, r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(dss, r)) in dss_dump_regs() argument
372 if (dss_runtime_get(dss)) in dss_dump_regs()
375 DUMPREG(dss, DSS_REVISION); in dss_dump_regs()
376 DUMPREG(dss, DSS_SYSCONFIG); in dss_dump_regs()
377 DUMPREG(dss, DSS_SYSSTATUS); in dss_dump_regs()
378 DUMPREG(dss, DSS_CONTROL); in dss_dump_regs()
380 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) { in dss_dump_regs()
381 DUMPREG(dss, DSS_SDI_CONTROL); in dss_dump_regs()
382 DUMPREG(dss, DSS_PLL_CONTROL); in dss_dump_regs()
383 DUMPREG(dss, DSS_SDI_STATUS); in dss_dump_regs()
386 dss_runtime_put(dss); in dss_dump_regs()
393 struct dss_device *dss = s->private; in dss_debug_dump_clocks() local
395 dss_dump_clocks(dss, s); in dss_debug_dump_clocks()
396 dispc_dump_clocks(dss->dispc, s); in dss_debug_dump_clocks()
418 static void dss_select_dispc_clk_source(struct dss_device *dss, in dss_select_dispc_clk_source() argument
427 if (WARN_ON(dss->feat->has_lcd_clk_src && clk_src != DSS_CLK_SRC_FCK)) in dss_select_dispc_clk_source()
445 REG_FLD_MOD(dss, DSS_CONTROL, b, /* DISPC_CLK_SWITCH */ in dss_select_dispc_clk_source()
446 dss->feat->dispc_clk_switch.start, in dss_select_dispc_clk_source()
447 dss->feat->dispc_clk_switch.end); in dss_select_dispc_clk_source()
449 dss->dispc_clk_source = clk_src; in dss_select_dispc_clk_source()
452 void dss_select_dsi_clk_source(struct dss_device *dss, int dsi_module, in dss_select_dsi_clk_source() argument
475 REG_FLD_MOD(dss, DSS_CONTROL, b, pos, pos); /* DSIx_CLK_SWITCH */ in dss_select_dsi_clk_source()
477 dss->dsi_clk_source[dsi_module] = clk_src; in dss_select_dsi_clk_source()
480 static int dss_lcd_clk_mux_dra7(struct dss_device *dss, in dss_lcd_clk_mux_dra7() argument
495 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_dra7()
499 r = dss_ctrl_pll_set_control_mux(dss, clk_src, channel); in dss_lcd_clk_mux_dra7()
503 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_dra7()
508 static int dss_lcd_clk_mux_omap5(struct dss_device *dss, in dss_lcd_clk_mux_omap5() argument
527 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap5()
534 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap5()
539 static int dss_lcd_clk_mux_omap4(struct dss_device *dss, in dss_lcd_clk_mux_omap4() argument
556 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap4()
563 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap4()
568 void dss_select_lcd_clk_source(struct dss_device *dss, in dss_select_lcd_clk_source() argument
575 if (!dss->feat->has_lcd_clk_src) { in dss_select_lcd_clk_source()
576 dss_select_dispc_clk_source(dss, clk_src); in dss_select_lcd_clk_source()
577 dss->lcd_clk_source[idx] = clk_src; in dss_select_lcd_clk_source()
581 r = dss->feat->ops->select_lcd_source(dss, channel, clk_src); in dss_select_lcd_clk_source()
585 dss->lcd_clk_source[idx] = clk_src; in dss_select_lcd_clk_source()
588 enum dss_clk_source dss_get_dispc_clk_source(struct dss_device *dss) in dss_get_dispc_clk_source() argument
590 return dss->dispc_clk_source; in dss_get_dispc_clk_source()
593 enum dss_clk_source dss_get_dsi_clk_source(struct dss_device *dss, in dss_get_dsi_clk_source() argument
596 return dss->dsi_clk_source[dsi_module]; in dss_get_dsi_clk_source()
599 enum dss_clk_source dss_get_lcd_clk_source(struct dss_device *dss, in dss_get_lcd_clk_source() argument
602 if (dss->feat->has_lcd_clk_src) { in dss_get_lcd_clk_source()
604 return dss->lcd_clk_source[idx]; in dss_get_lcd_clk_source()
608 return dss->dispc_clk_source; in dss_get_lcd_clk_source()
612 bool dss_div_calc(struct dss_device *dss, unsigned long pck, in dss_div_calc() argument
622 fck_hw_max = dss->feat->fck_freq_max; in dss_div_calc()
624 if (dss->parent_clk == NULL) { in dss_div_calc()
631 fck = clk_round_rate(dss->dss_clk, fck); in dss_div_calc()
636 fckd_hw_max = dss->feat->fck_div_max; in dss_div_calc()
638 m = dss->feat->dss_fck_multiplier; in dss_div_calc()
639 prate = clk_get_rate(dss->parent_clk); in dss_div_calc()
656 int dss_set_fck_rate(struct dss_device *dss, unsigned long rate) in dss_set_fck_rate() argument
662 r = clk_set_rate(dss->dss_clk, rate); in dss_set_fck_rate()
666 dss->dss_clk_rate = clk_get_rate(dss->dss_clk); in dss_set_fck_rate()
668 WARN_ONCE(dss->dss_clk_rate != rate, "clk rate mismatch: %lu != %lu", in dss_set_fck_rate()
669 dss->dss_clk_rate, rate); in dss_set_fck_rate()
674 unsigned long dss_get_dispc_clk_rate(struct dss_device *dss) in dss_get_dispc_clk_rate() argument
676 return dss->dss_clk_rate; in dss_get_dispc_clk_rate()
679 unsigned long dss_get_max_fck_rate(struct dss_device *dss) in dss_get_max_fck_rate() argument
681 return dss->feat->fck_freq_max; in dss_get_max_fck_rate()
684 enum omap_dss_output_id dss_get_supported_outputs(struct dss_device *dss, in dss_get_supported_outputs() argument
687 return dss->feat->outputs[channel]; in dss_get_supported_outputs()
690 static int dss_setup_default_clock(struct dss_device *dss) in dss_setup_default_clock() argument
697 max_dss_fck = dss->feat->fck_freq_max; in dss_setup_default_clock()
699 if (dss->parent_clk == NULL) { in dss_setup_default_clock()
700 fck = clk_round_rate(dss->dss_clk, max_dss_fck); in dss_setup_default_clock()
702 prate = clk_get_rate(dss->parent_clk); in dss_setup_default_clock()
704 fck_div = DIV_ROUND_UP(prate * dss->feat->dss_fck_multiplier, in dss_setup_default_clock()
707 * dss->feat->dss_fck_multiplier; in dss_setup_default_clock()
710 r = dss_set_fck_rate(dss, fck); in dss_setup_default_clock()
717 void dss_set_venc_output(struct dss_device *dss, enum omap_dss_venc_type type) in dss_set_venc_output() argument
729 REG_FLD_MOD(dss, DSS_CONTROL, l, 6, 6); in dss_set_venc_output()
732 void dss_set_dac_pwrdn_bgz(struct dss_device *dss, bool enable) in dss_set_dac_pwrdn_bgz() argument
735 REG_FLD_MOD(dss, DSS_CONTROL, enable, 5, 5); in dss_set_dac_pwrdn_bgz()
738 void dss_select_hdmi_venc_clk_source(struct dss_device *dss, in dss_select_hdmi_venc_clk_source() argument
743 outputs = dss->feat->outputs[OMAP_DSS_CHANNEL_DIGIT]; in dss_select_hdmi_venc_clk_source()
753 REG_FLD_MOD(dss, DSS_CONTROL, src, 15, 15); in dss_select_hdmi_venc_clk_source()
756 static int dss_dpi_select_source_omap2_omap3(struct dss_device *dss, int port, in dss_dpi_select_source_omap2_omap3() argument
765 static int dss_dpi_select_source_omap4(struct dss_device *dss, int port, in dss_dpi_select_source_omap4() argument
781 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 17); in dss_dpi_select_source_omap4()
786 static int dss_dpi_select_source_omap5(struct dss_device *dss, int port, in dss_dpi_select_source_omap5() argument
808 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 16); in dss_dpi_select_source_omap5()
813 static int dss_dpi_select_source_dra7xx(struct dss_device *dss, int port, in dss_dpi_select_source_dra7xx() argument
818 return dss_dpi_select_source_omap5(dss, port, channel); in dss_dpi_select_source_dra7xx()
834 int dss_dpi_select_source(struct dss_device *dss, int port, in dss_dpi_select_source() argument
837 return dss->feat->ops->dpi_select_source(dss, port, channel); in dss_dpi_select_source()
840 static int dss_get_clocks(struct dss_device *dss) in dss_get_clocks() argument
844 clk = devm_clk_get(&dss->pdev->dev, "fck"); in dss_get_clocks()
850 dss->dss_clk = clk; in dss_get_clocks()
852 if (dss->feat->parent_clk_name) { in dss_get_clocks()
853 clk = clk_get(NULL, dss->feat->parent_clk_name); in dss_get_clocks()
856 dss->feat->parent_clk_name); in dss_get_clocks()
863 dss->parent_clk = clk; in dss_get_clocks()
868 static void dss_put_clocks(struct dss_device *dss) in dss_put_clocks() argument
870 if (dss->parent_clk) in dss_put_clocks()
871 clk_put(dss->parent_clk); in dss_put_clocks()
874 int dss_runtime_get(struct dss_device *dss) in dss_runtime_get() argument
880 r = pm_runtime_get_sync(&dss->pdev->dev); in dss_runtime_get()
885 void dss_runtime_put(struct dss_device *dss) in dss_runtime_put() argument
891 r = pm_runtime_put_sync(&dss->pdev->dev); in dss_runtime_put()
902 static int dss_initialize_debugfs(struct dss_device *dss) in dss_initialize_debugfs() argument
910 dss->debugfs.root = dir; in dss_initialize_debugfs()
915 static void dss_uninitialize_debugfs(struct dss_device *dss) in dss_uninitialize_debugfs() argument
917 debugfs_remove_recursive(dss->debugfs.root); in dss_uninitialize_debugfs()
941 dss_debugfs_create_file(struct dss_device *dss, const char *name, in dss_debugfs_create_file() argument
955 d = debugfs_create_file(name, 0444, dss->debugfs.root, entry, in dss_debugfs_create_file()
976 static inline int dss_initialize_debugfs(struct dss_device *dss) in dss_initialize_debugfs() argument
980 static inline void dss_uninitialize_debugfs(struct dss_device *dss) in dss_uninitialize_debugfs() argument
1181 static int dss_init_ports(struct dss_device *dss) in dss_init_ports() argument
1183 struct platform_device *pdev = dss->pdev; in dss_init_ports()
1188 for (i = 0; i < dss->feat->num_ports; i++) { in dss_init_ports()
1193 switch (dss->feat->ports[i]) { in dss_init_ports()
1195 dpi_init_port(dss, pdev, port, dss->feat->model); in dss_init_ports()
1198 sdi_init_port(dss, pdev, port); in dss_init_ports()
1208 static void dss_uninit_ports(struct dss_device *dss) in dss_uninit_ports() argument
1210 struct platform_device *pdev = dss->pdev; in dss_uninit_ports()
1215 for (i = 0; i < dss->feat->num_ports; i++) { in dss_uninit_ports()
1220 switch (dss->feat->ports[i]) { in dss_uninit_ports()
1233 static int dss_video_pll_probe(struct dss_device *dss) in dss_video_pll_probe() argument
1235 struct platform_device *pdev = dss->pdev; in dss_video_pll_probe()
1244 dss->syscon_pll_ctrl = syscon_regmap_lookup_by_phandle(np, in dss_video_pll_probe()
1246 if (IS_ERR(dss->syscon_pll_ctrl)) { in dss_video_pll_probe()
1249 return PTR_ERR(dss->syscon_pll_ctrl); in dss_video_pll_probe()
1253 &dss->syscon_pll_ctrl_offset)) { in dss_video_pll_probe()
1279 dss->video1_pll = dss_video_pll_init(dss, pdev, 0, in dss_video_pll_probe()
1281 if (IS_ERR(dss->video1_pll)) in dss_video_pll_probe()
1282 return PTR_ERR(dss->video1_pll); in dss_video_pll_probe()
1286 dss->video2_pll = dss_video_pll_init(dss, pdev, 1, in dss_video_pll_probe()
1288 if (IS_ERR(dss->video2_pll)) { in dss_video_pll_probe()
1289 dss_video_pll_uninit(dss->video1_pll); in dss_video_pll_probe()
1290 return PTR_ERR(dss->video2_pll); in dss_video_pll_probe()
1317 struct dss_device *dss = dev_get_drvdata(dev); in dss_bind() local
1327 omapdss_set_dss(dss); in dss_bind()
1368 static int dss_probe_hardware(struct dss_device *dss) in dss_probe_hardware() argument
1373 r = dss_runtime_get(dss); in dss_probe_hardware()
1377 dss->dss_clk_rate = clk_get_rate(dss->dss_clk); in dss_probe_hardware()
1380 REG_FLD_MOD(dss, DSS_CONTROL, 0, 0, 0); in dss_probe_hardware()
1382 dss_select_dispc_clk_source(dss, DSS_CLK_SRC_FCK); in dss_probe_hardware()
1385 REG_FLD_MOD(dss, DSS_CONTROL, 1, 4, 4); /* venc dac demen */ in dss_probe_hardware()
1386 REG_FLD_MOD(dss, DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */ in dss_probe_hardware()
1387 REG_FLD_MOD(dss, DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */ in dss_probe_hardware()
1389 dss->dsi_clk_source[0] = DSS_CLK_SRC_FCK; in dss_probe_hardware()
1390 dss->dsi_clk_source[1] = DSS_CLK_SRC_FCK; in dss_probe_hardware()
1391 dss->dispc_clk_source = DSS_CLK_SRC_FCK; in dss_probe_hardware()
1392 dss->lcd_clk_source[0] = DSS_CLK_SRC_FCK; in dss_probe_hardware()
1393 dss->lcd_clk_source[1] = DSS_CLK_SRC_FCK; in dss_probe_hardware()
1395 rev = dss_read_reg(dss, DSS_REVISION); in dss_probe_hardware()
1398 dss_runtime_put(dss); in dss_probe_hardware()
1408 struct dss_device *dss; in dss_probe() local
1411 dss = kzalloc(sizeof(*dss), GFP_KERNEL); in dss_probe()
1412 if (!dss) in dss_probe()
1415 dss->pdev = pdev; in dss_probe()
1416 platform_set_drvdata(pdev, dss); in dss_probe()
1430 dss->feat = soc->data; in dss_probe()
1432 dss->feat = of_match_device(dss_of_match, &pdev->dev)->data; in dss_probe()
1436 dss->base = devm_ioremap_resource(&pdev->dev, dss_mem); in dss_probe()
1437 if (IS_ERR(dss->base)) { in dss_probe()
1438 r = PTR_ERR(dss->base); in dss_probe()
1442 r = dss_get_clocks(dss); in dss_probe()
1446 r = dss_setup_default_clock(dss); in dss_probe()
1451 r = dss_video_pll_probe(dss); in dss_probe()
1455 r = dss_init_ports(dss); in dss_probe()
1462 r = dss_probe_hardware(dss); in dss_probe()
1467 r = dss_initialize_debugfs(dss); in dss_probe()
1471 dss->debugfs.clk = dss_debugfs_create_file(dss, "clk", in dss_probe()
1472 dss_debug_dump_clocks, dss); in dss_probe()
1473 dss->debugfs.dss = dss_debugfs_create_file(dss, "dss", dss_dump_regs, in dss_probe()
1474 dss); in dss_probe()
1486 dss_debugfs_remove_file(dss->debugfs.clk); in dss_probe()
1487 dss_debugfs_remove_file(dss->debugfs.dss); in dss_probe()
1488 dss_uninitialize_debugfs(dss); in dss_probe()
1492 dss_uninit_ports(dss); in dss_probe()
1495 if (dss->video1_pll) in dss_probe()
1496 dss_video_pll_uninit(dss->video1_pll); in dss_probe()
1497 if (dss->video2_pll) in dss_probe()
1498 dss_video_pll_uninit(dss->video2_pll); in dss_probe()
1501 dss_put_clocks(dss); in dss_probe()
1504 kfree(dss); in dss_probe()
1511 struct dss_device *dss = platform_get_drvdata(pdev); in dss_remove() local
1515 dss_debugfs_remove_file(dss->debugfs.clk); in dss_remove()
1516 dss_debugfs_remove_file(dss->debugfs.dss); in dss_remove()
1517 dss_uninitialize_debugfs(dss); in dss_remove()
1521 dss_uninit_ports(dss); in dss_remove()
1523 if (dss->video1_pll) in dss_remove()
1524 dss_video_pll_uninit(dss->video1_pll); in dss_remove()
1526 if (dss->video2_pll) in dss_remove()
1527 dss_video_pll_uninit(dss->video2_pll); in dss_remove()
1529 dss_put_clocks(dss); in dss_remove()
1531 kfree(dss); in dss_remove()
1553 struct dss_device *dss = dev_get_drvdata(dev); in dss_runtime_suspend() local
1555 dss_save_context(dss); in dss_runtime_suspend()
1565 struct dss_device *dss = dev_get_drvdata(dev); in dss_runtime_resume() local
1581 dss_restore_context(dss); in dss_runtime_resume()