Lines Matching refs:DSSERR

178 		DSSERR("illegal DSS PLL ID %d\n", pll->id);  in dss_ctrl_pll_enable()
206 			DSSERR("error in PLL mux config for LCD\n");  in dss_ctrl_pll_set_control_mux()
222 			DSSERR("error in PLL mux config for LCD2\n");  in dss_ctrl_pll_set_control_mux()
238 			DSSERR("error in PLL mux config for LCD3\n");  in dss_ctrl_pll_set_control_mux()
244 		DSSERR("error in PLL mux config\n");  in dss_ctrl_pll_set_control_mux()
290 			DSSERR("PLL lock request timed out\n");  in dss_sdi_enable()
302 			DSSERR("PLL lock timed out\n");  in dss_sdi_enable()
313 			DSSERR("SDI reset timed out\n");  in dss_sdi_enable()
846 		DSSERR("can't get clock fck\n");  in dss_get_clocks()
855 			DSSERR("Failed to get %s\n",  in dss_get_clocks()
1273 			DSSERR("can't get DPLL VDDA regulator\n");  in dss_video_pll_probe()