Lines Matching refs:dsi_write_reg

126 	dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, end))
466 static inline void dsi_write_reg(struct dsi_data *dsi, in dsi_write_reg() function
826 dsi_write_reg(dsi, DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK); in omap_dsi_irq_handler()
838 dsi_write_reg(dsi, DSI_VC_IRQSTATUS(i), vcstatus[i]); in omap_dsi_irq_handler()
846 dsi_write_reg(dsi, DSI_COMPLEXIO_IRQ_STATUS, ciostatus); in omap_dsi_irq_handler()
900 dsi_write_reg(dsi, status_reg, (mask ^ old_mask) & mask); in _omap_dsi_configure_irqs()
901 dsi_write_reg(dsi, enable_reg, mask); in _omap_dsi_configure_irqs()
1827 dsi_write_reg(dsi, DSI_COMPLEXIO_CFG1, r); in dsi_set_lane_config()
1904 dsi_write_reg(dsi, DSI_DSIPHY_CFG0, r); in dsi_cio_timings()
1917 dsi_write_reg(dsi, DSI_DSIPHY_CFG1, r); in dsi_cio_timings()
1921 dsi_write_reg(dsi, DSI_DSIPHY_CFG2, r); in dsi_cio_timings()
2146 dsi_write_reg(dsi, DSI_TIMING1, l); in dsi_cio_init()
2272 dsi_write_reg(dsi, DSI_TX_FIFO_VC_SIZE, r); in dsi_config_tx_fifo()
2304 dsi_write_reg(dsi, DSI_RX_FIFO_VC_SIZE, r); in dsi_config_rx_fifo()
2313 dsi_write_reg(dsi, DSI_TIMING1, r); in dsi_force_tx_stop_mode_io()
2486 dsi_write_reg(dsi, DSI_VC_CTRL(channel), r); in dsi_vc_initial_config()
2706 dsi_write_reg(dsi, DSI_VC_LONG_PACKET_HEADER(channel), val); in dsi_vc_write_long_header()
2719 dsi_write_reg(dsi, DSI_VC_LONG_PACKET_PAYLOAD(channel), val); in dsi_vc_write_long_payload()
2809 dsi_write_reg(dsi, DSI_VC_SHORT_PACKET_HEADER(channel), r); in dsi_vc_send_short()
3250 dsi_write_reg(dsi, DSI_TIMING2, r); in dsi_set_lp_rx_timeout()
3277 dsi_write_reg(dsi, DSI_TIMING1, r); in dsi_set_ta_timeout()
3304 dsi_write_reg(dsi, DSI_TIMING1, r); in dsi_set_stop_state_counter()
3331 dsi_write_reg(dsi, DSI_TIMING2, r); in dsi_set_hs_tx_timeout()
3383 dsi_write_reg(dsi, DSI_CTRL, r); in dsi_config_vp_sync_events()
3403 dsi_write_reg(dsi, DSI_CTRL, r); in dsi_config_blanking_modes()
3570 dsi_write_reg(dsi, DSI_VM_TIMING4, r); in dsi_config_cmd_mode_interleaving()
3576 dsi_write_reg(dsi, DSI_VM_TIMING5, r); in dsi_config_cmd_mode_interleaving()
3581 dsi_write_reg(dsi, DSI_VM_TIMING6, r); in dsi_config_cmd_mode_interleaving()
3635 dsi_write_reg(dsi, DSI_CTRL, r); in dsi_proto_config()
3697 dsi_write_reg(dsi, DSI_CLK_TIMING, r); in dsi_proto_timings()
3711 dsi_write_reg(dsi, DSI_VM_TIMING7, r); in dsi_proto_timings()
3749 dsi_write_reg(dsi, DSI_VM_TIMING1, r); in dsi_proto_timings()
3756 dsi_write_reg(dsi, DSI_VM_TIMING2, r); in dsi_proto_timings()
3761 dsi_write_reg(dsi, DSI_VM_TIMING3, r); in dsi_proto_timings()
3958 dsi_write_reg(dsi, DSI_VC_TE(channel), l); in dsi_update_screen_dispc()
3967 dsi_write_reg(dsi, DSI_VC_TE(channel), l); in dsi_update_screen_dispc()