Lines Matching refs:RR
439 #define RR(dispc, reg) \ macro
560 RR(dispc, CONFIG); in dispc_restore_context()
561 RR(dispc, LINE_NUMBER); in dispc_restore_context()
564 RR(dispc, GLOBAL_ALPHA); in dispc_restore_context()
566 RR(dispc, CONFIG2); in dispc_restore_context()
568 RR(dispc, CONFIG3); in dispc_restore_context()
571 RR(dispc, DEFAULT_COLOR(i)); in dispc_restore_context()
572 RR(dispc, TRANS_COLOR(i)); in dispc_restore_context()
573 RR(dispc, SIZE_MGR(i)); in dispc_restore_context()
576 RR(dispc, TIMING_H(i)); in dispc_restore_context()
577 RR(dispc, TIMING_V(i)); in dispc_restore_context()
578 RR(dispc, POL_FREQ(i)); in dispc_restore_context()
579 RR(dispc, DIVISORo(i)); in dispc_restore_context()
581 RR(dispc, DATA_CYCLE1(i)); in dispc_restore_context()
582 RR(dispc, DATA_CYCLE2(i)); in dispc_restore_context()
583 RR(dispc, DATA_CYCLE3(i)); in dispc_restore_context()
586 RR(dispc, CPR_COEF_R(i)); in dispc_restore_context()
587 RR(dispc, CPR_COEF_G(i)); in dispc_restore_context()
588 RR(dispc, CPR_COEF_B(i)); in dispc_restore_context()
593 RR(dispc, OVL_BA0(i)); in dispc_restore_context()
594 RR(dispc, OVL_BA1(i)); in dispc_restore_context()
595 RR(dispc, OVL_POSITION(i)); in dispc_restore_context()
596 RR(dispc, OVL_SIZE(i)); in dispc_restore_context()
597 RR(dispc, OVL_ATTRIBUTES(i)); in dispc_restore_context()
598 RR(dispc, OVL_FIFO_THRESHOLD(i)); in dispc_restore_context()
599 RR(dispc, OVL_ROW_INC(i)); in dispc_restore_context()
600 RR(dispc, OVL_PIXEL_INC(i)); in dispc_restore_context()
602 RR(dispc, OVL_PRELOAD(i)); in dispc_restore_context()
604 RR(dispc, OVL_WINDOW_SKIP(i)); in dispc_restore_context()
605 RR(dispc, OVL_TABLE_BA(i)); in dispc_restore_context()
608 RR(dispc, OVL_FIR(i)); in dispc_restore_context()
609 RR(dispc, OVL_PICTURE_SIZE(i)); in dispc_restore_context()
610 RR(dispc, OVL_ACCU0(i)); in dispc_restore_context()
611 RR(dispc, OVL_ACCU1(i)); in dispc_restore_context()
614 RR(dispc, OVL_FIR_COEF_H(i, j)); in dispc_restore_context()
617 RR(dispc, OVL_FIR_COEF_HV(i, j)); in dispc_restore_context()
620 RR(dispc, OVL_CONV_COEF(i, j)); in dispc_restore_context()
624 RR(dispc, OVL_FIR_COEF_V(i, j)); in dispc_restore_context()
628 RR(dispc, OVL_BA0_UV(i)); in dispc_restore_context()
629 RR(dispc, OVL_BA1_UV(i)); in dispc_restore_context()
630 RR(dispc, OVL_FIR2(i)); in dispc_restore_context()
631 RR(dispc, OVL_ACCU2_0(i)); in dispc_restore_context()
632 RR(dispc, OVL_ACCU2_1(i)); in dispc_restore_context()
635 RR(dispc, OVL_FIR_COEF_H2(i, j)); in dispc_restore_context()
638 RR(dispc, OVL_FIR_COEF_HV2(i, j)); in dispc_restore_context()
641 RR(dispc, OVL_FIR_COEF_V2(i, j)); in dispc_restore_context()
644 RR(dispc, OVL_ATTRIBUTES2(i)); in dispc_restore_context()
648 RR(dispc, DIVISOR); in dispc_restore_context()
651 RR(dispc, CONTROL); in dispc_restore_context()
653 RR(dispc, CONTROL2); in dispc_restore_context()
655 RR(dispc, CONTROL3); in dispc_restore_context()
663 RR(dispc, IRQENABLE); in dispc_restore_context()
669 #undef RR