61 #define REG_GET(dispc, idx, start, end) \  macro
384 	return REG_GET(dispc, rfld.reg, rfld.high, rfld.low);  in mgr_fld_read()
750 	return REG_GET(dispc, DISPC_CONTROL2, 6, 6) == 1;  in dispc_wb_go_busy()
758 	enable = REG_GET(dispc, DISPC_OVL_ATTRIBUTES(plane), 0, 0) == 1;  in dispc_wb_go()
763 	go = REG_GET(dispc, DISPC_CONTROL2, 6, 6) == 1;  in dispc_wb_go()
1406 		size = REG_GET(dispc, DISPC_OVL_FIFO_SIZE_STATUS(fifo),  in dispc_init_fifos()
1504 			REG_GET(dispc, DISPC_OVL_FIFO_THRESHOLD(plane),  in dispc_ovl_set_fifo_threshold()
1506 			REG_GET(dispc, DISPC_OVL_FIFO_THRESHOLD(plane),  in dispc_ovl_set_fifo_threshold()
3357 	lcd = REG_GET(dispc, DISPC_DIVISORo(channel), 23, 16);  in dispc_mgr_lclk_rate()
3771 	cinfo->lck_div = REG_GET(dispc, DISPC_DIVISORo(channel), 23, 16);  in dispc_mgr_get_clock_div()
3772 	cinfo->pck_div = REG_GET(dispc, DISPC_DIVISORo(channel), 7, 0);  in dispc_mgr_get_clock_div()
4671 	gatestate = REG_GET(dispc, DISPC_CONFIG, 8, 4);  in dispc_errata_i734_wa()
4935 	if (REG_GET(dispc, DISPC_CONFIG, 2, 1) != OMAP_DSS_LOAD_FRAME_ONLY) {  in dispc_runtime_resume()