Lines Matching refs:offset
43 init->offset, init_exec(init) ? \
365 return bit_I.offset; in init_table()
377 init_table_(struct nvbios_init *init, u16 offset, const char *name) in init_table_() argument
382 if (len >= offset + 2) { in init_table_()
383 data = nvbios_rd16(bios, data + offset); in init_table_()
461 init_xlat_(struct nvbios_init *init, u8 index, u8 offset) in init_xlat_() argument
468 return nvbios_rd08(bios, data + offset); in init_xlat_()
586 u8 opcode = nvbios_rd08(bios, init->offset); in init_reserved()
600 cont(" 0x%02x", nvbios_rd08(bios, init->offset + i)); in init_reserved()
602 init->offset += length; in init_reserved()
613 init->offset = 0x0000; in init_done()
624 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_prog()
625 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_prog()
626 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_prog()
627 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_prog()
628 u8 count = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_prog()
629 u32 reg = nvbios_rd32(bios, init->offset + 7); in init_io_restrict_prog()
635 init->offset += 11; in init_io_restrict_prog()
639 u32 data = nvbios_rd32(bios, init->offset); in init_io_restrict_prog()
648 init->offset += 4; in init_io_restrict_prog()
661 u8 count = nvbios_rd08(bios, init->offset + 1); in init_repeat()
665 init->offset += 2; in init_repeat()
667 init->repeat = init->offset; in init_repeat()
668 init->repend = init->offset; in init_repeat()
670 init->offset = init->repeat; in init_repeat()
675 init->offset = init->repend; in init_repeat()
687 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_pll()
688 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_pll()
689 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_pll()
690 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_pll()
691 s8 iofc = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_pll()
692 u8 count = nvbios_rd08(bios, init->offset + 7); in init_io_restrict_pll()
693 u32 reg = nvbios_rd32(bios, init->offset + 8); in init_io_restrict_pll()
699 init->offset += 12; in init_io_restrict_pll()
703 u32 freq = nvbios_rd16(bios, init->offset) * 10; in init_io_restrict_pll()
714 init->offset += 2; in init_io_restrict_pll()
727 init->offset += 1; in init_end_repeat()
730 init->repend = init->offset; in init_end_repeat()
731 init->offset = 0; in init_end_repeat()
743 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_copy()
744 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_copy()
745 u8 smask = nvbios_rd08(bios, init->offset + 6); in init_copy()
746 u16 port = nvbios_rd16(bios, init->offset + 7); in init_copy()
747 u8 index = nvbios_rd08(bios, init->offset + 9); in init_copy()
748 u8 mask = nvbios_rd08(bios, init->offset + 10); in init_copy()
755 init->offset += 11; in init_copy()
770 init->offset += 1; in init_not()
782 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_io_flag_condition()
785 init->offset += 2; in init_io_flag_condition()
800 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_generic_condition()
801 u8 size = nvbios_rd08(bios, init->offset + 2); in init_generic_condition()
806 init->offset += 3; in init_generic_condition()
835 init->offset += size; in init_generic_condition()
848 u8 index = nvbios_rd08(bios, init->offset + 1); in init_io_mask_or()
853 init->offset += 2; in init_io_mask_or()
867 u8 index = nvbios_rd08(bios, init->offset + 1); in init_io_or()
872 init->offset += 2; in init_io_or()
886 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_andn_reg()
887 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_andn_reg()
890 init->offset += 9; in init_andn_reg()
903 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_or_reg()
904 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_or_reg()
907 init->offset += 9; in init_or_reg()
920 u32 creg = nvbios_rd32(bios, init->offset + 1); in init_idx_addr_latched()
921 u32 dreg = nvbios_rd32(bios, init->offset + 5); in init_idx_addr_latched()
922 u32 mask = nvbios_rd32(bios, init->offset + 9); in init_idx_addr_latched()
923 u32 data = nvbios_rd32(bios, init->offset + 13); in init_idx_addr_latched()
924 u8 count = nvbios_rd08(bios, init->offset + 17); in init_idx_addr_latched()
928 init->offset += 18; in init_idx_addr_latched()
931 u8 iaddr = nvbios_rd08(bios, init->offset + 0); in init_idx_addr_latched()
932 u8 idata = nvbios_rd08(bios, init->offset + 1); in init_idx_addr_latched()
935 init->offset += 2; in init_idx_addr_latched()
950 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_pll2()
951 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_pll2()
952 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_pll2()
953 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_pll2()
954 u8 count = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_pll2()
955 u32 reg = nvbios_rd32(bios, init->offset + 7); in init_io_restrict_pll2()
961 init->offset += 11; in init_io_restrict_pll2()
965 u32 freq = nvbios_rd32(bios, init->offset); in init_io_restrict_pll2()
972 init->offset += 4; in init_io_restrict_pll2()
985 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll2()
986 u32 freq = nvbios_rd32(bios, init->offset + 5); in init_pll2()
989 init->offset += 9; in init_pll2()
1002 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_byte()
1003 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_i2c_byte()
1004 u8 count = nvbios_rd08(bios, init->offset + 3); in init_i2c_byte()
1007 init->offset += 4; in init_i2c_byte()
1010 u8 reg = nvbios_rd08(bios, init->offset + 0); in init_i2c_byte()
1011 u8 mask = nvbios_rd08(bios, init->offset + 1); in init_i2c_byte()
1012 u8 data = nvbios_rd08(bios, init->offset + 2); in init_i2c_byte()
1016 init->offset += 3; in init_i2c_byte()
1033 u8 index = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c_byte()
1034 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_zm_i2c_byte()
1035 u8 count = nvbios_rd08(bios, init->offset + 3); in init_zm_i2c_byte()
1038 init->offset += 4; in init_zm_i2c_byte()
1041 u8 reg = nvbios_rd08(bios, init->offset + 0); in init_zm_i2c_byte()
1042 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c_byte()
1045 init->offset += 2; in init_zm_i2c_byte()
1059 u8 index = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c()
1060 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_zm_i2c()
1061 u8 count = nvbios_rd08(bios, init->offset + 3); in init_zm_i2c()
1065 init->offset += 4; in init_zm_i2c()
1068 data[i] = nvbios_rd08(bios, init->offset); in init_zm_i2c()
1070 init->offset++; in init_zm_i2c()
1093 u8 tmds = nvbios_rd08(bios, init->offset + 1); in init_tmds()
1094 u8 addr = nvbios_rd08(bios, init->offset + 2); in init_tmds()
1095 u8 mask = nvbios_rd08(bios, init->offset + 3); in init_tmds()
1096 u8 data = nvbios_rd08(bios, init->offset + 4); in init_tmds()
1101 init->offset += 5; in init_tmds()
1119 u8 tmds = nvbios_rd08(bios, init->offset + 1); in init_zm_tmds_group()
1120 u8 count = nvbios_rd08(bios, init->offset + 2); in init_zm_tmds_group()
1124 init->offset += 3; in init_zm_tmds_group()
1127 u8 addr = nvbios_rd08(bios, init->offset + 0); in init_zm_tmds_group()
1128 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_tmds_group()
1131 init->offset += 2; in init_zm_tmds_group()
1146 u8 addr0 = nvbios_rd08(bios, init->offset + 1); in init_cr_idx_adr_latch()
1147 u8 addr1 = nvbios_rd08(bios, init->offset + 2); in init_cr_idx_adr_latch()
1148 u8 base = nvbios_rd08(bios, init->offset + 3); in init_cr_idx_adr_latch()
1149 u8 count = nvbios_rd08(bios, init->offset + 4); in init_cr_idx_adr_latch()
1153 init->offset += 5; in init_cr_idx_adr_latch()
1157 u8 data = nvbios_rd08(bios, init->offset); in init_cr_idx_adr_latch()
1160 init->offset += 1; in init_cr_idx_adr_latch()
1176 u8 addr = nvbios_rd08(bios, init->offset + 1); in init_cr()
1177 u8 mask = nvbios_rd08(bios, init->offset + 2); in init_cr()
1178 u8 data = nvbios_rd08(bios, init->offset + 3); in init_cr()
1182 init->offset += 4; in init_cr()
1196 u8 addr = nvbios_rd08(bios, init->offset + 1); in init_zm_cr()
1197 u8 data = nvbios_rd08(bios, init->offset + 2); in init_zm_cr()
1200 init->offset += 3; in init_zm_cr()
1213 u8 count = nvbios_rd08(bios, init->offset + 1); in init_zm_cr_group()
1216 init->offset += 2; in init_zm_cr_group()
1219 u8 addr = nvbios_rd08(bios, init->offset + 0); in init_zm_cr_group()
1220 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_cr_group()
1223 init->offset += 2; in init_zm_cr_group()
1237 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_condition_time()
1238 u8 retry = nvbios_rd08(bios, init->offset + 2); in init_condition_time()
1242 init->offset += 3; in init_condition_time()
1264 u16 msec = nvbios_rd16(bios, init->offset + 1); in init_ltime()
1267 init->offset += 3; in init_ltime()
1281 u32 base = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_sequence()
1282 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_reg_sequence()
1285 init->offset += 6; in init_zm_reg_sequence()
1288 u32 data = nvbios_rd32(bios, init->offset); in init_zm_reg_sequence()
1291 init->offset += 4; in init_zm_reg_sequence()
1306 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll_indirect()
1307 u16 addr = nvbios_rd16(bios, init->offset + 5); in init_pll_indirect()
1312 init->offset += 7; in init_pll_indirect()
1325 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_indirect()
1326 u16 addr = nvbios_rd16(bios, init->offset + 5); in init_zm_reg_indirect()
1331 init->offset += 7; in init_zm_reg_indirect()
1344 u16 addr = nvbios_rd16(bios, init->offset + 1); in init_sub_direct()
1350 save = init->offset; in init_sub_direct()
1351 init->offset = addr; in init_sub_direct()
1356 init->offset = save; in init_sub_direct()
1359 init->offset += 3; in init_sub_direct()
1370 u16 offset = nvbios_rd16(bios, init->offset + 1); in init_jump() local
1372 trace("JUMP\t0x%04x\n", offset); in init_jump()
1375 init->offset = offset; in init_jump()
1377 init->offset += 3; in init_jump()
1388 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_if()
1389 u8 addr = nvbios_rd08(bios, init->offset + 2); in init_i2c_if()
1390 u8 reg = nvbios_rd08(bios, init->offset + 3); in init_i2c_if()
1391 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_i2c_if()
1392 u8 data = nvbios_rd08(bios, init->offset + 5); in init_i2c_if()
1397 init->offset += 6; in init_i2c_if()
1415 u32 sreg = nvbios_rd32(bios, init->offset + 1); in init_copy_nv_reg()
1416 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_copy_nv_reg()
1417 u32 smask = nvbios_rd32(bios, init->offset + 6); in init_copy_nv_reg()
1418 u32 sxor = nvbios_rd32(bios, init->offset + 10); in init_copy_nv_reg()
1419 u32 dreg = nvbios_rd32(bios, init->offset + 14); in init_copy_nv_reg()
1420 u32 dmask = nvbios_rd32(bios, init->offset + 18); in init_copy_nv_reg()
1427 init->offset += 22; in init_copy_nv_reg()
1441 u16 port = nvbios_rd16(bios, init->offset + 1); in init_zm_index_io()
1442 u8 index = nvbios_rd08(bios, init->offset + 3); in init_zm_index_io()
1443 u8 data = nvbios_rd08(bios, init->offset + 4); in init_zm_index_io()
1446 init->offset += 5; in init_zm_index_io()
1461 init->offset += 1; in init_compute_mem()
1477 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_reset()
1478 u32 data1 = nvbios_rd32(bios, init->offset + 5); in init_reset()
1479 u32 data2 = nvbios_rd32(bios, init->offset + 9); in init_reset()
1483 init->offset += 13; in init_reset()
1517 init->offset += 1; in init_configure_mem()
1566 init->offset += 1; in init_configure_clk()
1600 init->offset += 1; in init_configure_preinit()
1623 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io()
1624 u8 mask = nvbios_rd16(bios, init->offset + 3); in init_io()
1625 u8 data = nvbios_rd16(bios, init->offset + 4); in init_io()
1629 init->offset += 5; in init_io()
1663 u8 index = nvbios_rd08(bios, init->offset + 1); in init_sub()
1670 save = init->offset; in init_sub()
1671 init->offset = addr; in init_sub()
1676 init->offset = save; in init_sub()
1679 init->offset += 2; in init_sub()
1690 u8 mask = nvbios_rd08(bios, init->offset + 1); in init_ram_condition()
1691 u8 value = nvbios_rd08(bios, init->offset + 2); in init_ram_condition()
1695 init->offset += 3; in init_ram_condition()
1709 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_nv_reg()
1710 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_nv_reg()
1711 u32 data = nvbios_rd32(bios, init->offset + 9); in init_nv_reg()
1714 init->offset += 13; in init_nv_reg()
1727 u8 macro = nvbios_rd08(bios, init->offset + 1); in init_macro()
1740 init->offset += 2; in init_macro()
1751 init->offset += 1; in init_resume()
1763 u32 mask = nvbios_rd32(bios, init->offset + 1); in init_strap_condition()
1764 u32 value = nvbios_rd32(bios, init->offset + 5); in init_strap_condition()
1767 init->offset += 9; in init_strap_condition()
1781 u16 usec = nvbios_rd16(bios, init->offset + 1); in init_time()
1784 init->offset += 3; in init_time()
1802 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_condition()
1805 init->offset += 2; in init_condition()
1819 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_io_condition()
1822 init->offset += 2; in init_io_condition()
1836 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg16()
1837 u16 data = nvbios_rd16(bios, init->offset + 5); in init_zm_reg16()
1840 init->offset += 7; in init_zm_reg16()
1853 u16 port = nvbios_rd16(bios, init->offset + 1); in init_index_io()
1854 u8 index = nvbios_rd16(bios, init->offset + 3); in init_index_io()
1855 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_index_io()
1856 u8 data = nvbios_rd08(bios, init->offset + 5); in init_index_io()
1861 init->offset += 6; in init_index_io()
1875 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll()
1876 u32 freq = nvbios_rd16(bios, init->offset + 5) * 10; in init_pll()
1879 init->offset += 7; in init_pll()
1892 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg()
1893 u32 data = nvbios_rd32(bios, init->offset + 5); in init_zm_reg()
1896 init->offset += 9; in init_zm_reg()
1912 u8 type = nvbios_rd08(bios, init->offset + 1); in init_ram_restrict_pll()
1918 init->offset += 2; in init_ram_restrict_pll()
1921 u32 freq = nvbios_rd32(bios, init->offset); in init_ram_restrict_pll()
1930 init->offset += 4; in init_ram_restrict_pll()
1944 init->offset += 1; in init_gpio()
1958 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_ram_restrict_zm_reg_group()
1959 u8 incr = nvbios_rd08(bios, init->offset + 5); in init_ram_restrict_zm_reg_group()
1960 u8 num = nvbios_rd08(bios, init->offset + 6); in init_ram_restrict_zm_reg_group()
1967 init->offset += 7; in init_ram_restrict_zm_reg_group()
1972 u32 data = nvbios_rd32(bios, init->offset); in init_ram_restrict_zm_reg_group()
1981 init->offset += 4; in init_ram_restrict_zm_reg_group()
1996 u32 sreg = nvbios_rd32(bios, init->offset + 1); in init_copy_zm_reg()
1997 u32 dreg = nvbios_rd32(bios, init->offset + 5); in init_copy_zm_reg()
2000 init->offset += 9; in init_copy_zm_reg()
2013 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_group()
2014 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_reg_group()
2017 init->offset += 6; in init_zm_reg_group()
2020 u32 data = nvbios_rd32(bios, init->offset); in init_zm_reg_group()
2023 init->offset += 4; in init_zm_reg_group()
2035 u32 saddr = nvbios_rd32(bios, init->offset + 1); in init_xlat()
2036 u8 sshift = nvbios_rd08(bios, init->offset + 5); in init_xlat()
2037 u8 smask = nvbios_rd08(bios, init->offset + 6); in init_xlat()
2038 u8 index = nvbios_rd08(bios, init->offset + 7); in init_xlat()
2039 u32 daddr = nvbios_rd32(bios, init->offset + 8); in init_xlat()
2040 u32 dmask = nvbios_rd32(bios, init->offset + 12); in init_xlat()
2041 u8 shift = nvbios_rd08(bios, init->offset + 16); in init_xlat()
2048 init->offset += 17; in init_xlat()
2063 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_mask_add()
2064 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_zm_mask_add()
2065 u32 add = nvbios_rd32(bios, init->offset + 9); in init_zm_mask_add()
2069 init->offset += 13; in init_zm_mask_add()
2084 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_auxch()
2085 u8 count = nvbios_rd08(bios, init->offset + 5); in init_auxch()
2088 init->offset += 6; in init_auxch()
2091 u8 mask = nvbios_rd08(bios, init->offset + 0); in init_auxch()
2092 u8 data = nvbios_rd08(bios, init->offset + 1); in init_auxch()
2096 init->offset += 2; in init_auxch()
2108 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_auxch()
2109 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_auxch()
2112 init->offset += 6; in init_zm_auxch()
2115 u8 data = nvbios_rd08(bios, init->offset + 0); in init_zm_auxch()
2118 init->offset += 1; in init_zm_auxch()
2130 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_long_if()
2131 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_i2c_long_if()
2132 u8 reglo = nvbios_rd08(bios, init->offset + 3); in init_i2c_long_if()
2133 u8 reghi = nvbios_rd08(bios, init->offset + 4); in init_i2c_long_if()
2134 u8 mask = nvbios_rd08(bios, init->offset + 5); in init_i2c_long_if()
2135 u8 data = nvbios_rd08(bios, init->offset + 6); in init_i2c_long_if()
2141 init->offset += 7; in init_i2c_long_if()
2171 u8 count = nvbios_rd08(bios, init->offset + 1); in init_gpio_ne()
2176 init->offset += 2; in init_gpio_ne()
2178 for (i = init->offset; i < init->offset + count; i++) in init_gpio_ne()
2184 for (i = init->offset; i < init->offset + count; i++) { in init_gpio_ne()
2190 if (i == (init->offset + count)) { in init_gpio_ne()
2199 init->offset += count; in init_gpio_ne()
2282 while (init->offset) { in nvbios_exec()
2283 u8 opcode = nvbios_rd08(bios, init->offset); in nvbios_exec()