Lines Matching refs:gr
49 gf100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc) in gf100_gr_zbc_clear_color() argument
51 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_zbc_clear_color()
52 if (gr->zbc_color[zbc].format) { in gf100_gr_zbc_clear_color()
53 nvkm_wr32(device, 0x405804, gr->zbc_color[zbc].ds[0]); in gf100_gr_zbc_clear_color()
54 nvkm_wr32(device, 0x405808, gr->zbc_color[zbc].ds[1]); in gf100_gr_zbc_clear_color()
55 nvkm_wr32(device, 0x40580c, gr->zbc_color[zbc].ds[2]); in gf100_gr_zbc_clear_color()
56 nvkm_wr32(device, 0x405810, gr->zbc_color[zbc].ds[3]); in gf100_gr_zbc_clear_color()
58 nvkm_wr32(device, 0x405814, gr->zbc_color[zbc].format); in gf100_gr_zbc_clear_color()
64 gf100_gr_zbc_color_get(struct gf100_gr *gr, int format, in gf100_gr_zbc_color_get() argument
67 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_color_get()
71 if (gr->zbc_color[i].format) { in gf100_gr_zbc_color_get()
72 if (gr->zbc_color[i].format != format) in gf100_gr_zbc_color_get()
74 if (memcmp(gr->zbc_color[i].ds, ds, sizeof( in gf100_gr_zbc_color_get()
75 gr->zbc_color[i].ds))) in gf100_gr_zbc_color_get()
77 if (memcmp(gr->zbc_color[i].l2, l2, sizeof( in gf100_gr_zbc_color_get()
78 gr->zbc_color[i].l2))) { in gf100_gr_zbc_color_get()
91 memcpy(gr->zbc_color[zbc].ds, ds, sizeof(gr->zbc_color[zbc].ds)); in gf100_gr_zbc_color_get()
92 memcpy(gr->zbc_color[zbc].l2, l2, sizeof(gr->zbc_color[zbc].l2)); in gf100_gr_zbc_color_get()
93 gr->zbc_color[zbc].format = format; in gf100_gr_zbc_color_get()
95 gr->func->zbc->clear_color(gr, zbc); in gf100_gr_zbc_color_get()
100 gf100_gr_zbc_clear_depth(struct gf100_gr *gr, int zbc) in gf100_gr_zbc_clear_depth() argument
102 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_zbc_clear_depth()
103 if (gr->zbc_depth[zbc].format) in gf100_gr_zbc_clear_depth()
104 nvkm_wr32(device, 0x405818, gr->zbc_depth[zbc].ds); in gf100_gr_zbc_clear_depth()
105 nvkm_wr32(device, 0x40581c, gr->zbc_depth[zbc].format); in gf100_gr_zbc_clear_depth()
111 gf100_gr_zbc_depth_get(struct gf100_gr *gr, int format, in gf100_gr_zbc_depth_get() argument
114 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_depth_get()
118 if (gr->zbc_depth[i].format) { in gf100_gr_zbc_depth_get()
119 if (gr->zbc_depth[i].format != format) in gf100_gr_zbc_depth_get()
121 if (gr->zbc_depth[i].ds != ds) in gf100_gr_zbc_depth_get()
123 if (gr->zbc_depth[i].l2 != l2) { in gf100_gr_zbc_depth_get()
136 gr->zbc_depth[zbc].format = format; in gf100_gr_zbc_depth_get()
137 gr->zbc_depth[zbc].ds = ds; in gf100_gr_zbc_depth_get()
138 gr->zbc_depth[zbc].l2 = l2; in gf100_gr_zbc_depth_get()
140 gr->func->zbc->clear_depth(gr, zbc); in gf100_gr_zbc_depth_get()
163 struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); in gf100_fermi_mthd_zbc_color() local
190 ret = gf100_gr_zbc_color_get(gr, args->v0.format, in gf100_fermi_mthd_zbc_color()
209 struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); in gf100_fermi_mthd_zbc_depth() local
218 ret = gf100_gr_zbc_depth_get(gr, args->v0.format, in gf100_fermi_mthd_zbc_depth()
301 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_object_get() local
304 while (gr->func->sclass[c].oclass) { in gf100_gr_object_get()
306 *sclass = gr->func->sclass[index]; in gf100_gr_object_get()
324 struct gf100_gr *gr = chan->gr; in gf100_gr_chan_bind() local
327 ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size, in gf100_gr_chan_bind()
333 for (i = 0; i < gr->size; i += 4) in gf100_gr_chan_bind()
334 nvkm_wo32(*pgpuobj, i, gr->data[i / 4]); in gf100_gr_chan_bind()
336 if (!gr->firmware) { in gf100_gr_chan_bind()
382 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_chan_new() local
383 struct gf100_gr_data *data = gr->mmio_data; in gf100_gr_chan_new()
384 struct gf100_gr_mmio *mmio = gr->mmio_list; in gf100_gr_chan_new()
387 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_chan_new()
393 chan->gr = gr; in gf100_gr_chan_new()
416 for (i = 0; data->size && i < ARRAY_SIZE(gr->mmio_data); i++) { in gf100_gr_chan_new()
441 for (i = 0; mmio->addr && i < ARRAY_SIZE(gr->mmio_list); i++) { in gf100_gr_chan_new()
721 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_chsw_load() local
722 if (!gr->firmware) { in gf100_gr_chsw_load()
723 u32 trace = nvkm_rd32(gr->base.engine.subdev.device, 0x40981c); in gf100_gr_chsw_load()
727 u32 mthd = nvkm_rd32(gr->base.engine.subdev.device, 0x409808); in gf100_gr_chsw_load()
735 gf100_gr_rops(struct gf100_gr *gr) in gf100_gr_rops() argument
737 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_rops()
742 gf100_gr_zbc_init(struct gf100_gr *gr) in gf100_gr_zbc_init() argument
752 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_init()
755 if (!gr->zbc_color[0].format) { in gf100_gr_zbc_init()
756 gf100_gr_zbc_color_get(gr, 1, & zero[0], &zero[4]); c++; in gf100_gr_zbc_init()
757 gf100_gr_zbc_color_get(gr, 2, & one[0], &one[4]); c++; in gf100_gr_zbc_init()
758 gf100_gr_zbc_color_get(gr, 4, &f32_0[0], &f32_0[4]); c++; in gf100_gr_zbc_init()
759 gf100_gr_zbc_color_get(gr, 4, &f32_1[0], &f32_1[4]); c++; in gf100_gr_zbc_init()
760 gf100_gr_zbc_depth_get(gr, 1, 0x00000000, 0x00000000); d++; in gf100_gr_zbc_init()
761 gf100_gr_zbc_depth_get(gr, 1, 0x3f800000, 0x3f800000); d++; in gf100_gr_zbc_init()
762 if (gr->func->zbc->stencil_get) { in gf100_gr_zbc_init()
763 gr->func->zbc->stencil_get(gr, 1, 0x00, 0x00); s++; in gf100_gr_zbc_init()
764 gr->func->zbc->stencil_get(gr, 1, 0x01, 0x01); s++; in gf100_gr_zbc_init()
765 gr->func->zbc->stencil_get(gr, 1, 0xff, 0xff); s++; in gf100_gr_zbc_init()
770 gr->func->zbc->clear_color(gr, index); in gf100_gr_zbc_init()
772 gr->func->zbc->clear_depth(gr, index); in gf100_gr_zbc_init()
774 if (gr->func->zbc->clear_stencil) { in gf100_gr_zbc_init()
776 gr->func->zbc->clear_stencil(gr, index); in gf100_gr_zbc_init()
786 gf100_gr_wait_idle(struct gf100_gr *gr) in gf100_gr_wait_idle() argument
788 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_wait_idle()
815 gf100_gr_mmio(struct gf100_gr *gr, const struct gf100_gr_pack *p) in gf100_gr_mmio() argument
817 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_mmio()
832 gf100_gr_icmd(struct gf100_gr *gr, const struct gf100_gr_pack *p) in gf100_gr_icmd() argument
834 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_icmd()
857 gf100_gr_wait_idle(gr); in gf100_gr_icmd()
870 gf100_gr_mthd(struct gf100_gr *gr, const struct gf100_gr_pack *p) in gf100_gr_mthd() argument
872 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_mthd()
897 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_units() local
900 cfg = (u32)gr->gpc_nr; in gf100_gr_units()
901 cfg |= (u32)gr->tpc_total << 8; in gf100_gr_units()
902 cfg |= (u64)gr->rop_nr << 32; in gf100_gr_units()
969 gf100_gr_trap_gpc_rop(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc_rop() argument
971 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_gpc_rop()
1030 gf100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_mp() argument
1032 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_mp()
1051 gf100_gr_trap_tpc(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_tpc() argument
1053 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_tpc()
1065 gr->func->trap_mp(gr, gpc, tpc); in gf100_gr_trap_tpc()
1096 gf100_gr_trap_gpc(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc() argument
1098 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_gpc()
1104 gf100_gr_trap_gpc_rop(gr, gpc); in gf100_gr_trap_gpc()
1129 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_gr_trap_gpc()
1132 gf100_gr_trap_tpc(gr, gpc, tpc); in gf100_gr_trap_gpc()
1144 gf100_gr_trap_intr(struct gf100_gr *gr) in gf100_gr_trap_intr() argument
1146 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_intr()
1238 for (gpc = 0; stat && gpc < gr->gpc_nr; gpc++) { in gf100_gr_trap_intr()
1241 gf100_gr_trap_gpc(gr, gpc); in gf100_gr_trap_intr()
1251 for (rop = 0; rop < gr->rop_nr; rop++) { in gf100_gr_trap_intr()
1270 gf100_gr_ctxctl_debug_unit(struct gf100_gr *gr, u32 base) in gf100_gr_ctxctl_debug_unit() argument
1272 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_ctxctl_debug_unit()
1289 gf100_gr_ctxctl_debug(struct gf100_gr *gr) in gf100_gr_ctxctl_debug() argument
1291 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_ctxctl_debug()
1295 gf100_gr_ctxctl_debug_unit(gr, 0x409000); in gf100_gr_ctxctl_debug()
1297 gf100_gr_ctxctl_debug_unit(gr, 0x502000 + (gpc * 0x8000)); in gf100_gr_ctxctl_debug()
1301 gf100_gr_ctxctl_isr(struct gf100_gr *gr) in gf100_gr_ctxctl_isr() argument
1303 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_ctxctl_isr()
1307 if (!gr->firmware && (stat & 0x00000001)) { in gf100_gr_ctxctl_isr()
1326 if (!gr->firmware && (stat & 0x00080000)) { in gf100_gr_ctxctl_isr()
1328 gf100_gr_ctxctl_debug(gr); in gf100_gr_ctxctl_isr()
1335 gf100_gr_ctxctl_debug(gr); in gf100_gr_ctxctl_isr()
1343 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_intr() local
1344 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_intr()
1412 gf100_gr_trap_intr(gr); in gf100_gr_intr()
1418 gf100_gr_ctxctl_isr(gr); in gf100_gr_intr()
1441 gf100_gr_init_csdata(struct gf100_gr *gr, in gf100_gr_init_csdata() argument
1445 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_csdata()
1484 gf100_gr_init_ctxctl_ext(struct gf100_gr *gr) in gf100_gr_init_ctxctl_ext() argument
1486 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_init_ctxctl_ext()
1498 gf100_gr_init_fw(gr->fecs, &gr->fuc409c, &gr->fuc409d); in gf100_gr_init_ctxctl_ext()
1503 gf100_gr_init_fw(gr->gpccs, &gr->fuc41ac, &gr->fuc41ad); in gf100_gr_init_ctxctl_ext()
1518 nvkm_falcon_start(gr->gpccs); in gf100_gr_init_ctxctl_ext()
1519 nvkm_falcon_start(gr->fecs); in gf100_gr_init_ctxctl_ext()
1535 if ((gr->size = nvkm_rd32(device, 0x409800))) in gf100_gr_init_ctxctl_ext()
1593 if (gr->data == NULL) { in gf100_gr_init_ctxctl_ext()
1594 int ret = gf100_grctx_generate(gr); in gf100_gr_init_ctxctl_ext()
1605 gf100_gr_init_ctxctl_int(struct gf100_gr *gr) in gf100_gr_init_ctxctl_int() argument
1607 const struct gf100_grctx_func *grctx = gr->func->grctx; in gf100_gr_init_ctxctl_int()
1608 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_init_ctxctl_int()
1611 if (!gr->func->fecs.ucode) { in gf100_gr_init_ctxctl_int()
1617 nvkm_falcon_load_dmem(gr->fecs, gr->func->fecs.ucode->data.data, 0x0, in gf100_gr_init_ctxctl_int()
1618 gr->func->fecs.ucode->data.size, 0); in gf100_gr_init_ctxctl_int()
1619 nvkm_falcon_load_imem(gr->fecs, gr->func->fecs.ucode->code.data, 0x0, in gf100_gr_init_ctxctl_int()
1620 gr->func->fecs.ucode->code.size, 0, 0, false); in gf100_gr_init_ctxctl_int()
1623 nvkm_falcon_load_dmem(gr->gpccs, gr->func->gpccs.ucode->data.data, 0x0, in gf100_gr_init_ctxctl_int()
1624 gr->func->gpccs.ucode->data.size, 0); in gf100_gr_init_ctxctl_int()
1625 nvkm_falcon_load_imem(gr->gpccs, gr->func->gpccs.ucode->code.data, 0x0, in gf100_gr_init_ctxctl_int()
1626 gr->func->gpccs.ucode->code.size, 0, 0, false); in gf100_gr_init_ctxctl_int()
1630 gf100_gr_init_csdata(gr, grctx->hub, 0x409000, 0x000, 0x000000); in gf100_gr_init_ctxctl_int()
1631 gf100_gr_init_csdata(gr, grctx->gpc_0, 0x41a000, 0x000, 0x418000); in gf100_gr_init_ctxctl_int()
1632 gf100_gr_init_csdata(gr, grctx->gpc_1, 0x41a000, 0x000, 0x418000); in gf100_gr_init_ctxctl_int()
1633 gf100_gr_init_csdata(gr, grctx->tpc, 0x41a000, 0x004, 0x419800); in gf100_gr_init_ctxctl_int()
1634 gf100_gr_init_csdata(gr, grctx->ppc, 0x41a000, 0x008, 0x41be00); in gf100_gr_init_ctxctl_int()
1643 gf100_gr_ctxctl_debug(gr); in gf100_gr_init_ctxctl_int()
1647 gr->size = nvkm_rd32(device, 0x409804); in gf100_gr_init_ctxctl_int()
1648 if (gr->data == NULL) { in gf100_gr_init_ctxctl_int()
1649 int ret = gf100_grctx_generate(gr); in gf100_gr_init_ctxctl_int()
1660 gf100_gr_init_ctxctl(struct gf100_gr *gr) in gf100_gr_init_ctxctl() argument
1664 if (gr->firmware) in gf100_gr_init_ctxctl()
1665 ret = gf100_gr_init_ctxctl_ext(gr); in gf100_gr_init_ctxctl()
1667 ret = gf100_gr_init_ctxctl_int(gr); in gf100_gr_init_ctxctl()
1673 gf100_gr_oneinit_sm_id(struct gf100_gr *gr) in gf100_gr_oneinit_sm_id() argument
1676 for (tpc = 0; tpc < gr->tpc_max; tpc++) { in gf100_gr_oneinit_sm_id()
1677 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_oneinit_sm_id()
1678 if (tpc < gr->tpc_nr[gpc]) { in gf100_gr_oneinit_sm_id()
1679 gr->sm[gr->sm_nr].gpc = gpc; in gf100_gr_oneinit_sm_id()
1680 gr->sm[gr->sm_nr].tpc = tpc; in gf100_gr_oneinit_sm_id()
1681 gr->sm_nr++; in gf100_gr_oneinit_sm_id()
1688 gf100_gr_oneinit_tiles(struct gf100_gr *gr) in gf100_gr_oneinit_tiles() argument
1698 switch (gr->tpc_total) { in gf100_gr_oneinit_tiles()
1699 case 15: gr->screen_tile_row_offset = 0x06; break; in gf100_gr_oneinit_tiles()
1700 case 14: gr->screen_tile_row_offset = 0x05; break; in gf100_gr_oneinit_tiles()
1701 case 13: gr->screen_tile_row_offset = 0x02; break; in gf100_gr_oneinit_tiles()
1702 case 11: gr->screen_tile_row_offset = 0x07; break; in gf100_gr_oneinit_tiles()
1703 case 10: gr->screen_tile_row_offset = 0x06; break; in gf100_gr_oneinit_tiles()
1705 case 5: gr->screen_tile_row_offset = 0x01; break; in gf100_gr_oneinit_tiles()
1706 case 3: gr->screen_tile_row_offset = 0x02; break; in gf100_gr_oneinit_tiles()
1708 case 1: gr->screen_tile_row_offset = 0x01; break; in gf100_gr_oneinit_tiles()
1709 default: gr->screen_tile_row_offset = 0x03; in gf100_gr_oneinit_tiles()
1711 if (gr->tpc_total % primes[i]) { in gf100_gr_oneinit_tiles()
1712 gr->screen_tile_row_offset = primes[i]; in gf100_gr_oneinit_tiles()
1720 for (i = 0; i < gr->gpc_nr; i++) in gf100_gr_oneinit_tiles()
1725 for (sorted = true, i = 0; i < gr->gpc_nr - 1; i++) { in gf100_gr_oneinit_tiles()
1726 if (gr->tpc_nr[gpc_map[i + 1]] > in gf100_gr_oneinit_tiles()
1727 gr->tpc_nr[gpc_map[i + 0]]) { in gf100_gr_oneinit_tiles()
1737 mul_factor = gr->gpc_nr * gr->tpc_max; in gf100_gr_oneinit_tiles()
1743 comm_denom = gr->gpc_nr * gr->tpc_max * mul_factor; in gf100_gr_oneinit_tiles()
1745 for (i = 0; i < gr->gpc_nr; i++) { in gf100_gr_oneinit_tiles()
1746 init_frac[i] = gr->tpc_nr[gpc_map[i]] * gr->gpc_nr * mul_factor; in gf100_gr_oneinit_tiles()
1747 init_err[i] = i * gr->tpc_max * mul_factor - comm_denom/2; in gf100_gr_oneinit_tiles()
1751 for (i = 0; i < gr->tpc_total;) { in gf100_gr_oneinit_tiles()
1752 for (j = 0; j < gr->gpc_nr; j++) { in gf100_gr_oneinit_tiles()
1754 gr->tile[i++] = gpc_map[j]; in gf100_gr_oneinit_tiles()
1766 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_oneinit() local
1767 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_oneinit()
1772 ret = nvkm_falcon_v1_new(subdev, "FECS", 0x409000, &gr->fecs); in gf100_gr_oneinit()
1776 ret = nvkm_falcon_v1_new(subdev, "GPCCS", 0x41a000, &gr->gpccs); in gf100_gr_oneinit()
1782 gr->rop_nr = gr->func->rops(gr); in gf100_gr_oneinit()
1783 gr->gpc_nr = nvkm_rd32(device, 0x409604) & 0x0000001f; in gf100_gr_oneinit()
1784 for (i = 0; i < gr->gpc_nr; i++) { in gf100_gr_oneinit()
1785 gr->tpc_nr[i] = nvkm_rd32(device, GPC_UNIT(i, 0x2608)); in gf100_gr_oneinit()
1786 gr->tpc_max = max(gr->tpc_max, gr->tpc_nr[i]); in gf100_gr_oneinit()
1787 gr->tpc_total += gr->tpc_nr[i]; in gf100_gr_oneinit()
1788 gr->ppc_nr[i] = gr->func->ppc_nr; in gf100_gr_oneinit()
1789 for (j = 0; j < gr->ppc_nr[i]; j++) { in gf100_gr_oneinit()
1790 gr->ppc_tpc_mask[i][j] = in gf100_gr_oneinit()
1792 if (gr->ppc_tpc_mask[i][j] == 0) in gf100_gr_oneinit()
1794 gr->ppc_mask[i] |= (1 << j); in gf100_gr_oneinit()
1795 gr->ppc_tpc_nr[i][j] = hweight8(gr->ppc_tpc_mask[i][j]); in gf100_gr_oneinit()
1796 if (gr->ppc_tpc_min == 0 || in gf100_gr_oneinit()
1797 gr->ppc_tpc_min > gr->ppc_tpc_nr[i][j]) in gf100_gr_oneinit()
1798 gr->ppc_tpc_min = gr->ppc_tpc_nr[i][j]; in gf100_gr_oneinit()
1799 if (gr->ppc_tpc_max < gr->ppc_tpc_nr[i][j]) in gf100_gr_oneinit()
1800 gr->ppc_tpc_max = gr->ppc_tpc_nr[i][j]; in gf100_gr_oneinit()
1804 memset(gr->tile, 0xff, sizeof(gr->tile)); in gf100_gr_oneinit()
1805 gr->func->oneinit_tiles(gr); in gf100_gr_oneinit()
1806 gr->func->oneinit_sm_id(gr); in gf100_gr_oneinit()
1813 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_init_() local
1817 nvkm_pmu_pgob(gr->base.engine.subdev.device->pmu, false); in gf100_gr_init_()
1819 ret = nvkm_falcon_get(gr->fecs, subdev); in gf100_gr_init_()
1823 ret = nvkm_falcon_get(gr->gpccs, subdev); in gf100_gr_init_()
1827 return gr->func->init(gr); in gf100_gr_init_()
1833 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_fini_() local
1834 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_fini_()
1835 nvkm_falcon_put(gr->gpccs, subdev); in gf100_gr_fini_()
1836 nvkm_falcon_put(gr->fecs, subdev); in gf100_gr_fini_()
1856 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_dtor() local
1858 if (gr->func->dtor) in gf100_gr_dtor()
1859 gr->func->dtor(gr); in gf100_gr_dtor()
1860 kfree(gr->data); in gf100_gr_dtor()
1862 nvkm_falcon_del(&gr->gpccs); in gf100_gr_dtor()
1863 nvkm_falcon_del(&gr->fecs); in gf100_gr_dtor()
1865 gf100_gr_dtor_fw(&gr->fuc409c); in gf100_gr_dtor()
1866 gf100_gr_dtor_fw(&gr->fuc409d); in gf100_gr_dtor()
1867 gf100_gr_dtor_fw(&gr->fuc41ac); in gf100_gr_dtor()
1868 gf100_gr_dtor_fw(&gr->fuc41ad); in gf100_gr_dtor()
1870 gf100_gr_dtor_init(gr->fuc_bundle); in gf100_gr_dtor()
1871 gf100_gr_dtor_init(gr->fuc_method); in gf100_gr_dtor()
1872 gf100_gr_dtor_init(gr->fuc_sw_ctx); in gf100_gr_dtor()
1873 gf100_gr_dtor_init(gr->fuc_sw_nonctx); in gf100_gr_dtor()
1875 return gr; in gf100_gr_dtor()
1892 gf100_gr_ctor_fw_legacy(struct gf100_gr *gr, const char *fwname, in gf100_gr_ctor_fw_legacy() argument
1895 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_ctor_fw_legacy()
1936 gf100_gr_ctor_fw(struct gf100_gr *gr, const char *fwname, in gf100_gr_ctor_fw() argument
1939 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_ctor_fw()
1946 ret = gf100_gr_ctor_fw_legacy(gr, fwname, fuc, ret); in gf100_gr_ctor_fw()
1960 int index, struct gf100_gr *gr) in gf100_gr_ctor() argument
1962 gr->func = func; in gf100_gr_ctor()
1963 gr->firmware = nvkm_boolopt(device->cfgopt, "NvGrUseFW", in gf100_gr_ctor()
1967 gr->firmware || func->fecs.ucode != NULL, in gf100_gr_ctor()
1968 &gr->base); in gf100_gr_ctor()
1975 struct gf100_gr *gr; in gf100_gr_new_() local
1978 if (!(gr = kzalloc(sizeof(*gr), GFP_KERNEL))) in gf100_gr_new_()
1980 *pgr = &gr->base; in gf100_gr_new_()
1982 ret = gf100_gr_ctor(func, device, index, gr); in gf100_gr_new_()
1986 if (gr->firmware) { in gf100_gr_new_()
1987 if (gf100_gr_ctor_fw(gr, "fecs_inst", &gr->fuc409c) || in gf100_gr_new_()
1988 gf100_gr_ctor_fw(gr, "fecs_data", &gr->fuc409d) || in gf100_gr_new_()
1989 gf100_gr_ctor_fw(gr, "gpccs_inst", &gr->fuc41ac) || in gf100_gr_new_()
1990 gf100_gr_ctor_fw(gr, "gpccs_data", &gr->fuc41ad)) in gf100_gr_new_()
1998 gf100_gr_init_400054(struct gf100_gr *gr) in gf100_gr_init_400054() argument
2000 nvkm_wr32(gr->base.engine.subdev.device, 0x400054, 0x34ce3464); in gf100_gr_init_400054()
2004 gf100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_init_shader_exceptions() argument
2006 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_shader_exceptions()
2012 gf100_gr_init_tex_hww_esr(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_init_tex_hww_esr() argument
2014 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_tex_hww_esr()
2019 gf100_gr_init_419eb4(struct gf100_gr *gr) in gf100_gr_init_419eb4() argument
2021 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_419eb4()
2026 gf100_gr_init_419cc0(struct gf100_gr *gr) in gf100_gr_init_419cc0() argument
2028 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_419cc0()
2033 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init_419cc0()
2034 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) in gf100_gr_init_419cc0()
2040 gf100_gr_init_40601c(struct gf100_gr *gr) in gf100_gr_init_40601c() argument
2042 nvkm_wr32(gr->base.engine.subdev.device, 0x40601c, 0xc0000000); in gf100_gr_init_40601c()
2046 gf100_gr_init_fecs_exceptions(struct gf100_gr *gr) in gf100_gr_init_fecs_exceptions() argument
2048 const u32 data = gr->firmware ? 0x000e0000 : 0x000e0001; in gf100_gr_init_fecs_exceptions()
2049 nvkm_wr32(gr->base.engine.subdev.device, 0x409c24, data); in gf100_gr_init_fecs_exceptions()
2053 gf100_gr_init_gpc_mmu(struct gf100_gr *gr) in gf100_gr_init_gpc_mmu() argument
2055 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_gpc_mmu()
2069 gf100_gr_init_num_active_ltcs(struct gf100_gr *gr) in gf100_gr_init_num_active_ltcs() argument
2071 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_num_active_ltcs()
2076 gf100_gr_init_zcull(struct gf100_gr *gr) in gf100_gr_init_zcull() argument
2078 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_zcull()
2079 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); in gf100_gr_init_zcull()
2080 const u8 tile_nr = ALIGN(gr->tpc_total, 32); in gf100_gr_init_zcull()
2085 for (data = 0, j = 0; j < 8 && i + j < gr->tpc_total; j++) { in gf100_gr_init_zcull()
2086 data |= bank[gr->tile[i + j]] << (j * 4); in gf100_gr_init_zcull()
2087 bank[gr->tile[i + j]]++; in gf100_gr_init_zcull()
2092 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init_zcull()
2094 gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); in gf100_gr_init_zcull()
2096 gr->tpc_total); in gf100_gr_init_zcull()
2104 gf100_gr_init_vsc_stream_master(struct gf100_gr *gr) in gf100_gr_init_vsc_stream_master() argument
2106 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_vsc_stream_master()
2111 gf100_gr_init(struct gf100_gr *gr) in gf100_gr_init() argument
2113 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init()
2116 if (gr->func->init_419bd8) in gf100_gr_init()
2117 gr->func->init_419bd8(gr); in gf100_gr_init()
2119 gr->func->init_gpc_mmu(gr); in gf100_gr_init()
2121 if (gr->fuc_sw_nonctx) in gf100_gr_init()
2122 gf100_gr_mmio(gr, gr->fuc_sw_nonctx); in gf100_gr_init()
2124 gf100_gr_mmio(gr, gr->func->mmio); in gf100_gr_init()
2126 gf100_gr_wait_idle(gr); in gf100_gr_init()
2128 if (gr->func->init_r405a14) in gf100_gr_init()
2129 gr->func->init_r405a14(gr); in gf100_gr_init()
2131 if (gr->func->clkgate_pack) in gf100_gr_init()
2132 nvkm_therm_clkgate_init(device->therm, gr->func->clkgate_pack); in gf100_gr_init()
2134 if (gr->func->init_bios) in gf100_gr_init()
2135 gr->func->init_bios(gr); in gf100_gr_init()
2137 gr->func->init_vsc_stream_master(gr); in gf100_gr_init()
2138 gr->func->init_zcull(gr); in gf100_gr_init()
2139 gr->func->init_num_active_ltcs(gr); in gf100_gr_init()
2140 if (gr->func->init_rop_active_fbps) in gf100_gr_init()
2141 gr->func->init_rop_active_fbps(gr); in gf100_gr_init()
2142 if (gr->func->init_bios_2) in gf100_gr_init()
2143 gr->func->init_bios_2(gr); in gf100_gr_init()
2144 if (gr->func->init_swdx_pes_mask) in gf100_gr_init()
2145 gr->func->init_swdx_pes_mask(gr); in gf100_gr_init()
2153 gr->func->init_fecs_exceptions(gr); in gf100_gr_init()
2154 if (gr->func->init_ds_hww_esr_2) in gf100_gr_init()
2155 gr->func->init_ds_hww_esr_2(gr); in gf100_gr_init()
2161 if (gr->func->init_40601c) in gf100_gr_init()
2162 gr->func->init_40601c(gr); in gf100_gr_init()
2167 if (gr->func->init_sked_hww_esr) in gf100_gr_init()
2168 gr->func->init_sked_hww_esr(gr); in gf100_gr_init()
2173 if (gr->func->init_419cc0) in gf100_gr_init()
2174 gr->func->init_419cc0(gr); in gf100_gr_init()
2175 if (gr->func->init_419eb4) in gf100_gr_init()
2176 gr->func->init_419eb4(gr); in gf100_gr_init()
2177 if (gr->func->init_419c9c) in gf100_gr_init()
2178 gr->func->init_419c9c(gr); in gf100_gr_init()
2180 if (gr->func->init_ppc_exceptions) in gf100_gr_init()
2181 gr->func->init_ppc_exceptions(gr); in gf100_gr_init()
2183 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init()
2188 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_gr_init()
2191 if (gr->func->init_tex_hww_esr) in gf100_gr_init()
2192 gr->func->init_tex_hww_esr(gr, gpc, tpc); in gf100_gr_init()
2194 if (gr->func->init_504430) in gf100_gr_init()
2195 gr->func->init_504430(gr, gpc, tpc); in gf100_gr_init()
2196 gr->func->init_shader_exceptions(gr, gpc, tpc); in gf100_gr_init()
2202 for (rop = 0; rop < gr->rop_nr; rop++) { in gf100_gr_init()
2216 if (gr->func->init_400054) in gf100_gr_init()
2217 gr->func->init_400054(gr); in gf100_gr_init()
2219 gf100_gr_zbc_init(gr); in gf100_gr_init()
2221 if (gr->func->init_4188a4) in gf100_gr_init()
2222 gr->func->init_4188a4(gr); in gf100_gr_init()
2224 return gf100_gr_init_ctxctl(gr); in gf100_gr_init()