35 	const struct gf100_grctx_func *grctx = info->gr->func->grctx;  in gp100_grctx_generate_pagepool()
47 	struct gf100_gr *gr = info->gr;  in gp100_grctx_generate_attrib()  local
48 	const struct gf100_grctx_func *grctx = gr->func->grctx;  in gp100_grctx_generate_attrib()
53 	u32 size = grctx->alpha_nr_max * gr->tpc_total;  in gp100_grctx_generate_attrib()
58 	for (gpc = 0; gpc < gr->gpc_nr; gpc++)  in gp100_grctx_generate_attrib()
59 		size += grctx->attrib_nr_max * gr->ppc_nr[gpc] * gr->ppc_tpc_max;  in gp100_grctx_generate_attrib()
72 	for (gpc = 0; gpc < gr->gpc_nr; gpc++) {  in gp100_grctx_generate_attrib()
73 		for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) {  in gp100_grctx_generate_attrib()
74 			const u32 as =  alpha * gr->ppc_tpc_nr[gpc][ppc];  in gp100_grctx_generate_attrib()
75 			const u32 bs = attrib * gr->ppc_tpc_max;  in gp100_grctx_generate_attrib()
78 			if (!(gr->ppc_mask[gpc] & (1 << ppc)))  in gp100_grctx_generate_attrib()
83 			bo += grctx->attrib_nr_max * gr->ppc_tpc_max;  in gp100_grctx_generate_attrib()
86 			ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc];  in gp100_grctx_generate_attrib()
96 gp100_grctx_generate_smid_config(struct gf100_gr *gr)  in gp100_grctx_generate_smid_config()  argument
98 	struct nvkm_device *device = gr->base.engine.subdev.device;  in gp100_grctx_generate_smid_config()
99 	const u32 dist_nr = DIV_ROUND_UP(gr->tpc_total, 4);  in gp100_grctx_generate_smid_config()
103 	for (sm = 0; sm < gr->sm_nr; sm++) {  in gp100_grctx_generate_smid_config()
104 		const u8 gpc = gr->sm[sm].gpc;  in gp100_grctx_generate_smid_config()
105 		const u8 tpc = gr->sm[sm].tpc;  in gp100_grctx_generate_smid_config()
107 		gpcs[gpc + (gr->func->gpc_nr * (tpc / 4))] |= sm << ((tpc % 4) * 8);  in gp100_grctx_generate_smid_config()