44 	struct nv04_dmaobj *dmaobj = nv04_dmaobj(base);  in nv04_dmaobj_bind()  local
45 	struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;  in nv04_dmaobj_bind()
46 	u64 offset = dmaobj->base.start & 0xfffff000;  in nv04_dmaobj_bind()
47 	u64 adjust = dmaobj->base.start & 0x00000fff;  in nv04_dmaobj_bind()
48 	u32 length = dmaobj->base.limit - dmaobj->base.start;  in nv04_dmaobj_bind()
51 	if (dmaobj->clone) {  in nv04_dmaobj_bind()
54 		if (!dmaobj->base.start)  in nv04_dmaobj_bind()
65 		nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | (adjust << 20));  in nv04_dmaobj_bind()
67 		nvkm_wo32(*pgpuobj, 0x08, dmaobj->flags2 | offset);  in nv04_dmaobj_bind()
68 		nvkm_wo32(*pgpuobj, 0x0c, dmaobj->flags2 | offset);  in nv04_dmaobj_bind()
85 	struct nv04_dmaobj *dmaobj;  in nv04_dmaobj_new()  local
88 	if (!(dmaobj = kzalloc(sizeof(*dmaobj), GFP_KERNEL)))  in nv04_dmaobj_new()
90 	*pdmaobj = &dmaobj->base;  in nv04_dmaobj_new()
93 			       &data, &size, &dmaobj->base);  in nv04_dmaobj_new()
97 	if (dmaobj->base.target == NV_MEM_TARGET_VM) {  in nv04_dmaobj_new()
99 			dmaobj->clone = true;  in nv04_dmaobj_new()
100 		dmaobj->base.target = NV_MEM_TARGET_PCI;  in nv04_dmaobj_new()
101 		dmaobj->base.access = NV_MEM_ACCESS_RW;  in nv04_dmaobj_new()
104 	dmaobj->flags0 = oclass->base.oclass;  in nv04_dmaobj_new()
105 	switch (dmaobj->base.target) {  in nv04_dmaobj_new()
107 		dmaobj->flags0 |= 0x00003000;  in nv04_dmaobj_new()
110 		dmaobj->flags0 |= 0x00023000;  in nv04_dmaobj_new()
113 		dmaobj->flags0 |= 0x00033000;  in nv04_dmaobj_new()
119 	switch (dmaobj->base.access) {  in nv04_dmaobj_new()
121 		dmaobj->flags0 |= 0x00004000;  in nv04_dmaobj_new()
124 		dmaobj->flags0 |= 0x00008000;  in nv04_dmaobj_new()
126 		dmaobj->flags2 |= 0x00000002;  in nv04_dmaobj_new()