49 	struct nv50_disp *disp = nv50_disp(base);  in nv50_disp_intr_()  local
50 	disp->func->intr(disp);  in nv50_disp_intr_()
56 	struct nv50_disp *disp = nv50_disp(base);  in nv50_disp_fini_()  local
57 	disp->func->fini(disp);  in nv50_disp_fini_()
63 	struct nv50_disp *disp = nv50_disp(base);  in nv50_disp_init_()  local
64 	return disp->func->init(disp);  in nv50_disp_init_()
70 	struct nv50_disp *disp = nv50_disp(base);  in nv50_disp_dtor_()  local
72 	nvkm_ramht_del(&disp->ramht);  in nv50_disp_dtor_()
73 	nvkm_gpuobj_del(&disp->inst);  in nv50_disp_dtor_()
75 	nvkm_event_fini(&disp->uevent);  in nv50_disp_dtor_()
76 	if (disp->wq)  in nv50_disp_dtor_()
77 		destroy_workqueue(disp->wq);  in nv50_disp_dtor_()
79 	return disp;  in nv50_disp_dtor_()
85 	struct nv50_disp *disp = nv50_disp(base);  in nv50_disp_oneinit_()  local
86 	const struct nv50_disp_func *func = disp->func;  in nv50_disp_oneinit_()
87 	struct nvkm_subdev *subdev = &disp->base.engine.subdev;  in nv50_disp_oneinit_()
92 		disp->wndw.nr = func->wndw.cnt(&disp->base, &disp->wndw.mask);  in nv50_disp_oneinit_()
94 			   disp->wndw.nr, disp->wndw.mask);  in nv50_disp_oneinit_()
97 	disp->head.nr = func->head.cnt(&disp->base, &disp->head.mask);  in nv50_disp_oneinit_()
99 		   disp->head.nr, disp->head.mask);  in nv50_disp_oneinit_()
100 	for_each_set_bit(i, &disp->head.mask, disp->head.nr) {  in nv50_disp_oneinit_()
101 		ret = func->head.new(&disp->base, i);  in nv50_disp_oneinit_()
107 		disp->dac.nr = func->dac.cnt(&disp->base, &disp->dac.mask);  in nv50_disp_oneinit_()
109 			   disp->dac.nr, disp->dac.mask);  in nv50_disp_oneinit_()
110 		for_each_set_bit(i, &disp->dac.mask, disp->dac.nr) {  in nv50_disp_oneinit_()
111 			ret = func->dac.new(&disp->base, i);  in nv50_disp_oneinit_()
118 		disp->pior.nr = func->pior.cnt(&disp->base, &disp->pior.mask);  in nv50_disp_oneinit_()
120 			   disp->pior.nr, disp->pior.mask);  in nv50_disp_oneinit_()
121 		for_each_set_bit(i, &disp->pior.mask, disp->pior.nr) {  in nv50_disp_oneinit_()
122 			ret = func->pior.new(&disp->base, i);  in nv50_disp_oneinit_()
128 	disp->sor.nr = func->sor.cnt(&disp->base, &disp->sor.mask);  in nv50_disp_oneinit_()
130 		   disp->sor.nr, disp->sor.mask);  in nv50_disp_oneinit_()
131 	for_each_set_bit(i, &disp->sor.mask, disp->sor.nr) {  in nv50_disp_oneinit_()
132 		ret = func->sor.new(&disp->base, i);  in nv50_disp_oneinit_()
138 			      &disp->inst);  in nv50_disp_oneinit_()
143 			      0x1000, 0, disp->inst, &disp->ramht);  in nv50_disp_oneinit_()
160 	struct nv50_disp *disp;  in nv50_disp_new_()  local
163 	if (!(disp = kzalloc(sizeof(*disp), GFP_KERNEL)))  in nv50_disp_new_()
165 	disp->func = func;  in nv50_disp_new_()
166 	*pdisp = &disp->base;  in nv50_disp_new_()
168 	ret = nvkm_disp_ctor(&nv50_disp_, device, index, &disp->base);  in nv50_disp_new_()
172 	disp->wq = create_singlethread_workqueue("nvkm-disp");  in nv50_disp_new_()
173 	if (!disp->wq)  in nv50_disp_new_()
176 	INIT_WORK(&disp->supervisor, func->super);  in nv50_disp_new_()
178 	return nvkm_event_init(func->uevent, 1, ARRAY_SIZE(disp->chan),  in nv50_disp_new_()
179 			       &disp->uevent);  in nv50_disp_new_()
187 	struct nvkm_bios *bios = head->disp->engine.subdev.device->bios;  in nv50_disp_super_iedt()
201 	struct nvkm_subdev *subdev = &head->disp->engine.subdev;  in nv50_disp_super_ied_on()
270 	nvbios_init(&head->disp->engine.subdev, iedt.script[id],  in nv50_disp_super_ied_off()
282 	list_for_each_entry(ior, &head->disp->ior, head) {  in nv50_disp_super_ior_asy()
296 	list_for_each_entry(ior, &head->disp->ior, head) {  in nv50_disp_super_ior_arm()
307 nv50_disp_super_3_0(struct nv50_disp *disp, struct nvkm_head *head)  in nv50_disp_super_3_0()  argument
328 	struct nvkm_subdev *subdev = &head->disp->engine.subdev;  in nv50_disp_super_2_2_dp()
432 nv50_disp_super_2_2(struct nv50_disp *disp, struct nvkm_head *head)  in nv50_disp_super_2_2()  argument
454 		head->asy.or.depth = (disp->sor.lvdsconf & 0x0200) ? 24 : 18;  in nv50_disp_super_2_2()
455 		ior->asy.link      = (disp->sor.lvdsconf & 0x0100) ? 3  : 1;  in nv50_disp_super_2_2()
479 nv50_disp_super_2_1(struct nv50_disp *disp, struct nvkm_head *head)  in nv50_disp_super_2_1()  argument
481 	struct nvkm_devinit *devinit = disp->base.engine.subdev.device->devinit;  in nv50_disp_super_2_1()
489 nv50_disp_super_2_0(struct nv50_disp *disp, struct nvkm_head *head)  in nv50_disp_super_2_0()  argument
513 nv50_disp_super_1_0(struct nv50_disp *disp, struct nvkm_head *head)  in nv50_disp_super_1_0()  argument
528 nv50_disp_super_1(struct nv50_disp *disp)  in nv50_disp_super_1()  argument
533 	list_for_each_entry(head, &disp->base.head, head) {  in nv50_disp_super_1()
538 	list_for_each_entry(ior, &disp->base.ior, head) {  in nv50_disp_super_1()
547 	struct nv50_disp *disp =  in nv50_disp_super()  local
549 	struct nvkm_subdev *subdev = &disp->base.engine.subdev;  in nv50_disp_super()
554 	nvkm_debug(subdev, "supervisor %08x %08x\n", disp->super, super);  in nv50_disp_super()
556 	if (disp->super & 0x00000010) {  in nv50_disp_super()
557 		nv50_disp_chan_mthd(disp->chan[0], NV_DBG_DEBUG);  in nv50_disp_super()
558 		nv50_disp_super_1(disp);  in nv50_disp_super()
559 		list_for_each_entry(head, &disp->base.head, head) {  in nv50_disp_super()
564 			nv50_disp_super_1_0(disp, head);  in nv50_disp_super()
567 	if (disp->super & 0x00000020) {  in nv50_disp_super()
568 		list_for_each_entry(head, &disp->base.head, head) {  in nv50_disp_super()
571 			nv50_disp_super_2_0(disp, head);  in nv50_disp_super()
573 		nvkm_outp_route(&disp->base);  in nv50_disp_super()
574 		list_for_each_entry(head, &disp->base.head, head) {  in nv50_disp_super()
577 			nv50_disp_super_2_1(disp, head);  in nv50_disp_super()
579 		list_for_each_entry(head, &disp->base.head, head) {  in nv50_disp_super()
582 			nv50_disp_super_2_2(disp, head);  in nv50_disp_super()
585 	if (disp->super & 0x00000040) {  in nv50_disp_super()
586 		list_for_each_entry(head, &disp->base.head, head) {  in nv50_disp_super()
589 			nv50_disp_super_3_0(disp, head);  in nv50_disp_super()
612 nv50_disp_intr_error(struct nv50_disp *disp, int chid)  in nv50_disp_intr_error()  argument
614 	struct nvkm_subdev *subdev = &disp->base.engine.subdev;  in nv50_disp_intr_error()
631 	if (chid < ARRAY_SIZE(disp->chan)) {  in nv50_disp_intr_error()
634 			nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR);  in nv50_disp_intr_error()
646 nv50_disp_intr(struct nv50_disp *disp)  in nv50_disp_intr()  argument
648 	struct nvkm_device *device = disp->base.engine.subdev.device;  in nv50_disp_intr()
654 		nv50_disp_intr_error(disp, chid);  in nv50_disp_intr()
660 		nv50_disp_chan_uevent_send(disp, chid);  in nv50_disp_intr()
665 		nvkm_disp_vblank(&disp->base, 0);  in nv50_disp_intr()
670 		nvkm_disp_vblank(&disp->base, 1);  in nv50_disp_intr()
675 		disp->super = (intr1 & 0x00000070);  in nv50_disp_intr()
676 		queue_work(disp->wq, &disp->supervisor);  in nv50_disp_intr()
677 		nvkm_wr32(device, 0x610024, disp->super);  in nv50_disp_intr()
682 nv50_disp_fini(struct nv50_disp *disp)  in nv50_disp_fini()  argument
684 	struct nvkm_device *device = disp->base.engine.subdev.device;  in nv50_disp_fini()
691 nv50_disp_init(struct nv50_disp *disp)  in nv50_disp_init()  argument
693 	struct nvkm_device *device = disp->base.engine.subdev.device;  in nv50_disp_init()
706 	list_for_each_entry(head, &disp->base.head, head) {  in nv50_disp_init()
718 	for (i = 0; i < disp->dac.nr; i++) {  in nv50_disp_init()
724 	for (i = 0; i < disp->sor.nr; i++) {  in nv50_disp_init()
730 	for (i = 0; i < disp->pior.nr; i++) {  in nv50_disp_init()
747 	nvkm_wr32(device, 0x610010, (disp->inst->addr >> 8) | 9);  in nv50_disp_init()