372 static inline uint32_t CP_LOAD_STATE_0_DST_OFF(uint32_t val)  in CP_LOAD_STATE_0_DST_OFF()
378 static inline uint32_t CP_LOAD_STATE_0_STATE_SRC(enum adreno_state_src val)  in CP_LOAD_STATE_0_STATE_SRC()
384 static inline uint32_t CP_LOAD_STATE_0_STATE_BLOCK(enum adreno_state_block val)  in CP_LOAD_STATE_0_STATE_BLOCK()
390 static inline uint32_t CP_LOAD_STATE_0_NUM_UNIT(uint32_t val)  in CP_LOAD_STATE_0_NUM_UNIT()
398 static inline uint32_t CP_LOAD_STATE_1_STATE_TYPE(enum adreno_state_type val)  in CP_LOAD_STATE_1_STATE_TYPE()
404 static inline uint32_t CP_LOAD_STATE_1_EXT_SRC_ADDR(uint32_t val)  in CP_LOAD_STATE_1_EXT_SRC_ADDR()
412 static inline uint32_t CP_LOAD_STATE4_0_DST_OFF(uint32_t val)  in CP_LOAD_STATE4_0_DST_OFF()
418 static inline uint32_t CP_LOAD_STATE4_0_STATE_SRC(enum a4xx_state_src val)  in CP_LOAD_STATE4_0_STATE_SRC()
424 static inline uint32_t CP_LOAD_STATE4_0_STATE_BLOCK(enum a4xx_state_block val)  in CP_LOAD_STATE4_0_STATE_BLOCK()
430 static inline uint32_t CP_LOAD_STATE4_0_NUM_UNIT(uint32_t val)  in CP_LOAD_STATE4_0_NUM_UNIT()
438 static inline uint32_t CP_LOAD_STATE4_1_STATE_TYPE(enum a4xx_state_type val)  in CP_LOAD_STATE4_1_STATE_TYPE()
444 static inline uint32_t CP_LOAD_STATE4_1_EXT_SRC_ADDR(uint32_t val)  in CP_LOAD_STATE4_1_EXT_SRC_ADDR()
452 static inline uint32_t CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(uint32_t val)  in CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI()
460 static inline uint32_t CP_LOAD_STATE6_0_DST_OFF(uint32_t val)  in CP_LOAD_STATE6_0_DST_OFF()
466 static inline uint32_t CP_LOAD_STATE6_0_STATE_TYPE(enum a6xx_state_type val)  in CP_LOAD_STATE6_0_STATE_TYPE()
472 static inline uint32_t CP_LOAD_STATE6_0_STATE_SRC(enum a6xx_state_src val)  in CP_LOAD_STATE6_0_STATE_SRC()
478 static inline uint32_t CP_LOAD_STATE6_0_STATE_BLOCK(enum a6xx_state_block val)  in CP_LOAD_STATE6_0_STATE_BLOCK()
484 static inline uint32_t CP_LOAD_STATE6_0_NUM_UNIT(uint32_t val)  in CP_LOAD_STATE6_0_NUM_UNIT()
492 static inline uint32_t CP_LOAD_STATE6_1_EXT_SRC_ADDR(uint32_t val)  in CP_LOAD_STATE6_1_EXT_SRC_ADDR()
500 static inline uint32_t CP_LOAD_STATE6_2_EXT_SRC_ADDR_HI(uint32_t val)  in CP_LOAD_STATE6_2_EXT_SRC_ADDR_HI()
508 static inline uint32_t CP_DRAW_INDX_0_VIZ_QUERY(uint32_t val)  in CP_DRAW_INDX_0_VIZ_QUERY()
516 static inline uint32_t CP_DRAW_INDX_1_PRIM_TYPE(enum pc_di_primtype val)  in CP_DRAW_INDX_1_PRIM_TYPE()
522 static inline uint32_t CP_DRAW_INDX_1_SOURCE_SELECT(enum pc_di_src_sel val)  in CP_DRAW_INDX_1_SOURCE_SELECT()
528 static inline uint32_t CP_DRAW_INDX_1_VIS_CULL(enum pc_di_vis_cull_mode val)  in CP_DRAW_INDX_1_VIS_CULL()
534 static inline uint32_t CP_DRAW_INDX_1_INDEX_SIZE(enum pc_di_index_size val)  in CP_DRAW_INDX_1_INDEX_SIZE()
543 static inline uint32_t CP_DRAW_INDX_1_NUM_INSTANCES(uint32_t val)  in CP_DRAW_INDX_1_NUM_INSTANCES()
551 static inline uint32_t CP_DRAW_INDX_2_NUM_INDICES(uint32_t val)  in CP_DRAW_INDX_2_NUM_INDICES()
559 static inline uint32_t CP_DRAW_INDX_3_INDX_BASE(uint32_t val)  in CP_DRAW_INDX_3_INDX_BASE()
567 static inline uint32_t CP_DRAW_INDX_4_INDX_SIZE(uint32_t val)  in CP_DRAW_INDX_4_INDX_SIZE()
575 static inline uint32_t CP_DRAW_INDX_2_0_VIZ_QUERY(uint32_t val)  in CP_DRAW_INDX_2_0_VIZ_QUERY()
583 static inline uint32_t CP_DRAW_INDX_2_1_PRIM_TYPE(enum pc_di_primtype val)  in CP_DRAW_INDX_2_1_PRIM_TYPE()
589 static inline uint32_t CP_DRAW_INDX_2_1_SOURCE_SELECT(enum pc_di_src_sel val)  in CP_DRAW_INDX_2_1_SOURCE_SELECT()
595 static inline uint32_t CP_DRAW_INDX_2_1_VIS_CULL(enum pc_di_vis_cull_mode val)  in CP_DRAW_INDX_2_1_VIS_CULL()
601 static inline uint32_t CP_DRAW_INDX_2_1_INDEX_SIZE(enum pc_di_index_size val)  in CP_DRAW_INDX_2_1_INDEX_SIZE()
610 static inline uint32_t CP_DRAW_INDX_2_1_NUM_INSTANCES(uint32_t val)  in CP_DRAW_INDX_2_1_NUM_INSTANCES()
618 static inline uint32_t CP_DRAW_INDX_2_2_NUM_INDICES(uint32_t val)  in CP_DRAW_INDX_2_2_NUM_INDICES()
626 static inline uint32_t CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(enum pc_di_primtype val)  in CP_DRAW_INDX_OFFSET_0_PRIM_TYPE()
632 static inline uint32_t CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(enum pc_di_src_sel val)  in CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT()
638 static inline uint32_t CP_DRAW_INDX_OFFSET_0_VIS_CULL(enum pc_di_vis_cull_mode val)  in CP_DRAW_INDX_OFFSET_0_VIS_CULL()
644 static inline uint32_t CP_DRAW_INDX_OFFSET_0_INDEX_SIZE(enum a4xx_index_size val)  in CP_DRAW_INDX_OFFSET_0_INDEX_SIZE()
650 static inline uint32_t CP_DRAW_INDX_OFFSET_0_TESS_MODE(uint32_t val)  in CP_DRAW_INDX_OFFSET_0_TESS_MODE()
658 static inline uint32_t CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES(uint32_t val)  in CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES()
666 static inline uint32_t CP_DRAW_INDX_OFFSET_2_NUM_INDICES(uint32_t val)  in CP_DRAW_INDX_OFFSET_2_NUM_INDICES()
676 static inline uint32_t CP_DRAW_INDX_OFFSET_4_INDX_BASE(uint32_t val)  in CP_DRAW_INDX_OFFSET_4_INDX_BASE()
684 static inline uint32_t CP_DRAW_INDX_OFFSET_5_INDX_SIZE(uint32_t val)  in CP_DRAW_INDX_OFFSET_5_INDX_SIZE()
692 static inline uint32_t A4XX_CP_DRAW_INDIRECT_0_PRIM_TYPE(enum pc_di_primtype val)  in A4XX_CP_DRAW_INDIRECT_0_PRIM_TYPE()
698 static inline uint32_t A4XX_CP_DRAW_INDIRECT_0_SOURCE_SELECT(enum pc_di_src_sel val)  in A4XX_CP_DRAW_INDIRECT_0_SOURCE_SELECT()
704 static inline uint32_t A4XX_CP_DRAW_INDIRECT_0_VIS_CULL(enum pc_di_vis_cull_mode val)  in A4XX_CP_DRAW_INDIRECT_0_VIS_CULL()
710 static inline uint32_t A4XX_CP_DRAW_INDIRECT_0_INDEX_SIZE(enum a4xx_index_size val)  in A4XX_CP_DRAW_INDIRECT_0_INDEX_SIZE()
716 static inline uint32_t A4XX_CP_DRAW_INDIRECT_0_TESS_MODE(uint32_t val)  in A4XX_CP_DRAW_INDIRECT_0_TESS_MODE()
724 static inline uint32_t A4XX_CP_DRAW_INDIRECT_1_INDIRECT(uint32_t val)  in A4XX_CP_DRAW_INDIRECT_1_INDIRECT()
733 static inline uint32_t A5XX_CP_DRAW_INDIRECT_2_INDIRECT_HI(uint32_t val)  in A5XX_CP_DRAW_INDIRECT_2_INDIRECT_HI()
741 static inline uint32_t A4XX_CP_DRAW_INDX_INDIRECT_0_PRIM_TYPE(enum pc_di_primtype val)  in A4XX_CP_DRAW_INDX_INDIRECT_0_PRIM_TYPE()
747 static inline uint32_t A4XX_CP_DRAW_INDX_INDIRECT_0_SOURCE_SELECT(enum pc_di_src_sel val)  in A4XX_CP_DRAW_INDX_INDIRECT_0_SOURCE_SELECT()
753 static inline uint32_t A4XX_CP_DRAW_INDX_INDIRECT_0_VIS_CULL(enum pc_di_vis_cull_mode val)  in A4XX_CP_DRAW_INDX_INDIRECT_0_VIS_CULL()
759 static inline uint32_t A4XX_CP_DRAW_INDX_INDIRECT_0_INDEX_SIZE(enum a4xx_index_size val)  in A4XX_CP_DRAW_INDX_INDIRECT_0_INDEX_SIZE()
765 static inline uint32_t A4XX_CP_DRAW_INDX_INDIRECT_0_TESS_MODE(uint32_t val)  in A4XX_CP_DRAW_INDX_INDIRECT_0_TESS_MODE()
774 static inline uint32_t A4XX_CP_DRAW_INDX_INDIRECT_1_INDX_BASE(uint32_t val)  in A4XX_CP_DRAW_INDX_INDIRECT_1_INDX_BASE()
782 static inline uint32_t A4XX_CP_DRAW_INDX_INDIRECT_2_INDX_SIZE(uint32_t val)  in A4XX_CP_DRAW_INDX_INDIRECT_2_INDX_SIZE()
790 static inline uint32_t A4XX_CP_DRAW_INDX_INDIRECT_3_INDIRECT(uint32_t val)  in A4XX_CP_DRAW_INDX_INDIRECT_3_INDIRECT()
799 static inline uint32_t A5XX_CP_DRAW_INDX_INDIRECT_1_INDX_BASE_LO(uint32_t val)  in A5XX_CP_DRAW_INDX_INDIRECT_1_INDX_BASE_LO()
807 static inline uint32_t A5XX_CP_DRAW_INDX_INDIRECT_2_INDX_BASE_HI(uint32_t val)  in A5XX_CP_DRAW_INDX_INDIRECT_2_INDX_BASE_HI()
815 static inline uint32_t A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(uint32_t val)  in A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES()
823 static inline uint32_t A5XX_CP_DRAW_INDX_INDIRECT_4_INDIRECT_LO(uint32_t val)  in A5XX_CP_DRAW_INDX_INDIRECT_4_INDIRECT_LO()
831 static inline uint32_t A5XX_CP_DRAW_INDX_INDIRECT_5_INDIRECT_HI(uint32_t val)  in A5XX_CP_DRAW_INDX_INDIRECT_5_INDIRECT_HI()
836 static inline uint32_t REG_CP_SET_DRAW_STATE_(uint32_t i0) { return 0x00000000 + 0x3*i0; }  in REG_CP_SET_DRAW_STATE_()
838 static inline uint32_t REG_CP_SET_DRAW_STATE__0(uint32_t i0) { return 0x00000000 + 0x3*i0; }  in REG_CP_SET_DRAW_STATE__0()
841 static inline uint32_t CP_SET_DRAW_STATE__0_COUNT(uint32_t val)  in CP_SET_DRAW_STATE__0_COUNT()
851 static inline uint32_t CP_SET_DRAW_STATE__0_ENABLE_MASK(uint32_t val)  in CP_SET_DRAW_STATE__0_ENABLE_MASK()
857 static inline uint32_t CP_SET_DRAW_STATE__0_GROUP_ID(uint32_t val)  in CP_SET_DRAW_STATE__0_GROUP_ID()
862 static inline uint32_t REG_CP_SET_DRAW_STATE__1(uint32_t i0) { return 0x00000001 + 0x3*i0; }  in REG_CP_SET_DRAW_STATE__1()
865 static inline uint32_t CP_SET_DRAW_STATE__1_ADDR_LO(uint32_t val)  in CP_SET_DRAW_STATE__1_ADDR_LO()
870 static inline uint32_t REG_CP_SET_DRAW_STATE__2(uint32_t i0) { return 0x00000002 + 0x3*i0; }  in REG_CP_SET_DRAW_STATE__2()
873 static inline uint32_t CP_SET_DRAW_STATE__2_ADDR_HI(uint32_t val)  in CP_SET_DRAW_STATE__2_ADDR_HI()
883 static inline uint32_t CP_SET_BIN_1_X1(uint32_t val)  in CP_SET_BIN_1_X1()
889 static inline uint32_t CP_SET_BIN_1_Y1(uint32_t val)  in CP_SET_BIN_1_Y1()
897 static inline uint32_t CP_SET_BIN_2_X2(uint32_t val)  in CP_SET_BIN_2_X2()
903 static inline uint32_t CP_SET_BIN_2_Y2(uint32_t val)  in CP_SET_BIN_2_Y2()
911 static inline uint32_t CP_SET_BIN_DATA_0_BIN_DATA_ADDR(uint32_t val)  in CP_SET_BIN_DATA_0_BIN_DATA_ADDR()
919 static inline uint32_t CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS(uint32_t val)  in CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS()
927 static inline uint32_t CP_SET_BIN_DATA5_0_VSC_SIZE(uint32_t val)  in CP_SET_BIN_DATA5_0_VSC_SIZE()
933 static inline uint32_t CP_SET_BIN_DATA5_0_VSC_N(uint32_t val)  in CP_SET_BIN_DATA5_0_VSC_N()
941 static inline uint32_t CP_SET_BIN_DATA5_1_BIN_DATA_ADDR_LO(uint32_t val)  in CP_SET_BIN_DATA5_1_BIN_DATA_ADDR_LO()
949 static inline uint32_t CP_SET_BIN_DATA5_2_BIN_DATA_ADDR_HI(uint32_t val)  in CP_SET_BIN_DATA5_2_BIN_DATA_ADDR_HI()
957 static inline uint32_t CP_SET_BIN_DATA5_3_BIN_SIZE_ADDRESS_LO(uint32_t val)  in CP_SET_BIN_DATA5_3_BIN_SIZE_ADDRESS_LO()
965 static inline uint32_t CP_SET_BIN_DATA5_4_BIN_SIZE_ADDRESS_HI(uint32_t val)  in CP_SET_BIN_DATA5_4_BIN_SIZE_ADDRESS_HI()
973 static inline uint32_t CP_SET_BIN_DATA5_5_XXX_ADDRESS_LO(uint32_t val)  in CP_SET_BIN_DATA5_5_XXX_ADDRESS_LO()
981 static inline uint32_t CP_SET_BIN_DATA5_6_XXX_ADDRESS_HI(uint32_t val)  in CP_SET_BIN_DATA5_6_XXX_ADDRESS_HI()
989 static inline uint32_t CP_REG_TO_MEM_0_REG(uint32_t val)  in CP_REG_TO_MEM_0_REG()
995 static inline uint32_t CP_REG_TO_MEM_0_CNT(uint32_t val)  in CP_REG_TO_MEM_0_CNT()
1005 static inline uint32_t CP_REG_TO_MEM_1_DEST(uint32_t val)  in CP_REG_TO_MEM_1_DEST()
1013 static inline uint32_t CP_REG_TO_MEM_2_DEST_HI(uint32_t val)  in CP_REG_TO_MEM_2_DEST_HI()
1021 static inline uint32_t CP_MEM_TO_REG_0_REG(uint32_t val)  in CP_MEM_TO_REG_0_REG()
1027 static inline uint32_t CP_MEM_TO_REG_0_CNT(uint32_t val)  in CP_MEM_TO_REG_0_CNT()
1037 static inline uint32_t CP_MEM_TO_REG_1_SRC(uint32_t val)  in CP_MEM_TO_REG_1_SRC()
1045 static inline uint32_t CP_MEM_TO_REG_2_SRC_HI(uint32_t val)  in CP_MEM_TO_REG_2_SRC_HI()
1059 static inline uint32_t CP_COND_WRITE_0_FUNCTION(enum cp_cond_function val)  in CP_COND_WRITE_0_FUNCTION()
1069 static inline uint32_t CP_COND_WRITE_1_POLL_ADDR(uint32_t val)  in CP_COND_WRITE_1_POLL_ADDR()
1077 static inline uint32_t CP_COND_WRITE_2_REF(uint32_t val)  in CP_COND_WRITE_2_REF()
1085 static inline uint32_t CP_COND_WRITE_3_MASK(uint32_t val)  in CP_COND_WRITE_3_MASK()
1093 static inline uint32_t CP_COND_WRITE_4_WRITE_ADDR(uint32_t val)  in CP_COND_WRITE_4_WRITE_ADDR()
1101 static inline uint32_t CP_COND_WRITE_5_WRITE_DATA(uint32_t val)  in CP_COND_WRITE_5_WRITE_DATA()
1109 static inline uint32_t CP_COND_WRITE5_0_FUNCTION(enum cp_cond_function val)  in CP_COND_WRITE5_0_FUNCTION()
1119 static inline uint32_t CP_COND_WRITE5_1_POLL_ADDR_LO(uint32_t val)  in CP_COND_WRITE5_1_POLL_ADDR_LO()
1127 static inline uint32_t CP_COND_WRITE5_2_POLL_ADDR_HI(uint32_t val)  in CP_COND_WRITE5_2_POLL_ADDR_HI()
1135 static inline uint32_t CP_COND_WRITE5_3_REF(uint32_t val)  in CP_COND_WRITE5_3_REF()
1143 static inline uint32_t CP_COND_WRITE5_4_MASK(uint32_t val)  in CP_COND_WRITE5_4_MASK()
1151 static inline uint32_t CP_COND_WRITE5_5_WRITE_ADDR_LO(uint32_t val)  in CP_COND_WRITE5_5_WRITE_ADDR_LO()
1159 static inline uint32_t CP_COND_WRITE5_6_WRITE_ADDR_HI(uint32_t val)  in CP_COND_WRITE5_6_WRITE_ADDR_HI()
1167 static inline uint32_t CP_COND_WRITE5_7_WRITE_DATA(uint32_t val)  in CP_COND_WRITE5_7_WRITE_DATA()
1177 static inline uint32_t CP_DISPATCH_COMPUTE_1_X(uint32_t val)  in CP_DISPATCH_COMPUTE_1_X()
1185 static inline uint32_t CP_DISPATCH_COMPUTE_2_Y(uint32_t val)  in CP_DISPATCH_COMPUTE_2_Y()
1193 static inline uint32_t CP_DISPATCH_COMPUTE_3_Z(uint32_t val)  in CP_DISPATCH_COMPUTE_3_Z()
1201 static inline uint32_t CP_SET_RENDER_MODE_0_MODE(enum render_mode_cmd val)  in CP_SET_RENDER_MODE_0_MODE()
1209 static inline uint32_t CP_SET_RENDER_MODE_1_ADDR_0_LO(uint32_t val)  in CP_SET_RENDER_MODE_1_ADDR_0_LO()
1217 static inline uint32_t CP_SET_RENDER_MODE_2_ADDR_0_HI(uint32_t val)  in CP_SET_RENDER_MODE_2_ADDR_0_HI()
1231 static inline uint32_t CP_SET_RENDER_MODE_5_ADDR_1_LEN(uint32_t val)  in CP_SET_RENDER_MODE_5_ADDR_1_LEN()
1239 static inline uint32_t CP_SET_RENDER_MODE_6_ADDR_1_LO(uint32_t val)  in CP_SET_RENDER_MODE_6_ADDR_1_LO()
1247 static inline uint32_t CP_SET_RENDER_MODE_7_ADDR_1_HI(uint32_t val)  in CP_SET_RENDER_MODE_7_ADDR_1_HI()
1255 static inline uint32_t CP_COMPUTE_CHECKPOINT_0_ADDR_0_LO(uint32_t val)  in CP_COMPUTE_CHECKPOINT_0_ADDR_0_LO()
1263 static inline uint32_t CP_COMPUTE_CHECKPOINT_1_ADDR_0_HI(uint32_t val)  in CP_COMPUTE_CHECKPOINT_1_ADDR_0_HI()
1273 static inline uint32_t CP_COMPUTE_CHECKPOINT_3_ADDR_1_LEN(uint32_t val)  in CP_COMPUTE_CHECKPOINT_3_ADDR_1_LEN()
1283 static inline uint32_t CP_COMPUTE_CHECKPOINT_5_ADDR_1_LO(uint32_t val)  in CP_COMPUTE_CHECKPOINT_5_ADDR_1_LO()
1291 static inline uint32_t CP_COMPUTE_CHECKPOINT_6_ADDR_1_HI(uint32_t val)  in CP_COMPUTE_CHECKPOINT_6_ADDR_1_HI()
1303 static inline uint32_t CP_PERFCOUNTER_ACTION_1_ADDR_0_LO(uint32_t val)  in CP_PERFCOUNTER_ACTION_1_ADDR_0_LO()
1311 static inline uint32_t CP_PERFCOUNTER_ACTION_2_ADDR_0_HI(uint32_t val)  in CP_PERFCOUNTER_ACTION_2_ADDR_0_HI()
1319 static inline uint32_t CP_EVENT_WRITE_0_EVENT(enum vgt_event_type val)  in CP_EVENT_WRITE_0_EVENT()
1328 static inline uint32_t CP_EVENT_WRITE_1_ADDR_0_LO(uint32_t val)  in CP_EVENT_WRITE_1_ADDR_0_LO()
1336 static inline uint32_t CP_EVENT_WRITE_2_ADDR_0_HI(uint32_t val)  in CP_EVENT_WRITE_2_ADDR_0_HI()
1346 static inline uint32_t CP_BLIT_0_OP(enum cp_blit_cmd val)  in CP_BLIT_0_OP()
1354 static inline uint32_t CP_BLIT_1_SRC_X1(uint32_t val)  in CP_BLIT_1_SRC_X1()
1360 static inline uint32_t CP_BLIT_1_SRC_Y1(uint32_t val)  in CP_BLIT_1_SRC_Y1()
1368 static inline uint32_t CP_BLIT_2_SRC_X2(uint32_t val)  in CP_BLIT_2_SRC_X2()
1374 static inline uint32_t CP_BLIT_2_SRC_Y2(uint32_t val)  in CP_BLIT_2_SRC_Y2()
1382 static inline uint32_t CP_BLIT_3_DST_X1(uint32_t val)  in CP_BLIT_3_DST_X1()
1388 static inline uint32_t CP_BLIT_3_DST_Y1(uint32_t val)  in CP_BLIT_3_DST_Y1()
1396 static inline uint32_t CP_BLIT_4_DST_X2(uint32_t val)  in CP_BLIT_4_DST_X2()
1402 static inline uint32_t CP_BLIT_4_DST_Y2(uint32_t val)  in CP_BLIT_4_DST_Y2()
1412 static inline uint32_t CP_EXEC_CS_1_NGROUPS_X(uint32_t val)  in CP_EXEC_CS_1_NGROUPS_X()
1420 static inline uint32_t CP_EXEC_CS_2_NGROUPS_Y(uint32_t val)  in CP_EXEC_CS_2_NGROUPS_Y()
1428 static inline uint32_t CP_EXEC_CS_3_NGROUPS_Z(uint32_t val)  in CP_EXEC_CS_3_NGROUPS_Z()
1439 static inline uint32_t A4XX_CP_EXEC_CS_INDIRECT_1_ADDR(uint32_t val)  in A4XX_CP_EXEC_CS_INDIRECT_1_ADDR()
1447 static inline uint32_t A4XX_CP_EXEC_CS_INDIRECT_2_LOCALSIZEX(uint32_t val)  in A4XX_CP_EXEC_CS_INDIRECT_2_LOCALSIZEX()
1453 static inline uint32_t A4XX_CP_EXEC_CS_INDIRECT_2_LOCALSIZEY(uint32_t val)  in A4XX_CP_EXEC_CS_INDIRECT_2_LOCALSIZEY()
1459 static inline uint32_t A4XX_CP_EXEC_CS_INDIRECT_2_LOCALSIZEZ(uint32_t val)  in A4XX_CP_EXEC_CS_INDIRECT_2_LOCALSIZEZ()
1468 static inline uint32_t A5XX_CP_EXEC_CS_INDIRECT_1_ADDR_LO(uint32_t val)  in A5XX_CP_EXEC_CS_INDIRECT_1_ADDR_LO()
1476 static inline uint32_t A5XX_CP_EXEC_CS_INDIRECT_2_ADDR_HI(uint32_t val)  in A5XX_CP_EXEC_CS_INDIRECT_2_ADDR_HI()
1484 static inline uint32_t A5XX_CP_EXEC_CS_INDIRECT_3_LOCALSIZEX(uint32_t val)  in A5XX_CP_EXEC_CS_INDIRECT_3_LOCALSIZEX()
1490 static inline uint32_t A5XX_CP_EXEC_CS_INDIRECT_3_LOCALSIZEY(uint32_t val)  in A5XX_CP_EXEC_CS_INDIRECT_3_LOCALSIZEY()
1496 static inline uint32_t A5XX_CP_EXEC_CS_INDIRECT_3_LOCALSIZEZ(uint32_t val)  in A5XX_CP_EXEC_CS_INDIRECT_3_LOCALSIZEZ()
1504 static inline uint32_t A2XX_CP_SET_MARKER_0_MARKER(uint32_t val)  in A2XX_CP_SET_MARKER_0_MARKER()
1510 static inline uint32_t A2XX_CP_SET_MARKER_0_MODE(enum a6xx_render_mode val)  in A2XX_CP_SET_MARKER_0_MODE()
1516 static inline uint32_t REG_A2XX_CP_SET_PSEUDO_REG_(uint32_t i0) { return 0x00000000 + 0x3*i0; }  in REG_A2XX_CP_SET_PSEUDO_REG_()
1518 static inline uint32_t REG_A2XX_CP_SET_PSEUDO_REG__0(uint32_t i0) { return 0x00000000 + 0x3*i0; }  in REG_A2XX_CP_SET_PSEUDO_REG__0()
1521 static inline uint32_t A2XX_CP_SET_PSEUDO_REG__0_PSEUDO_REG(enum pseudo_reg val)  in A2XX_CP_SET_PSEUDO_REG__0_PSEUDO_REG()
1526 static inline uint32_t REG_A2XX_CP_SET_PSEUDO_REG__1(uint32_t i0) { return 0x00000001 + 0x3*i0; }  in REG_A2XX_CP_SET_PSEUDO_REG__1()
1529 static inline uint32_t A2XX_CP_SET_PSEUDO_REG__1_LO(uint32_t val)  in A2XX_CP_SET_PSEUDO_REG__1_LO()
1534 static inline uint32_t REG_A2XX_CP_SET_PSEUDO_REG__2(uint32_t i0) { return 0x00000002 + 0x3*i0; }  in REG_A2XX_CP_SET_PSEUDO_REG__2()
1537 static inline uint32_t A2XX_CP_SET_PSEUDO_REG__2_HI(uint32_t val)  in A2XX_CP_SET_PSEUDO_REG__2_HI()
1545 static inline uint32_t A2XX_CP_REG_TEST_0_REG(uint32_t val)  in A2XX_CP_REG_TEST_0_REG()
1551 static inline uint32_t A2XX_CP_REG_TEST_0_BIT(uint32_t val)  in A2XX_CP_REG_TEST_0_BIT()