21 static inline bool try_preempt_state(struct a5xx_gpu *a5xx_gpu,  in try_preempt_state()  argument
24 	enum preempt_state cur = atomic_cmpxchg(&a5xx_gpu->preempt_state,  in try_preempt_state()
34 static inline void set_preempt_state(struct a5xx_gpu *gpu,  in set_preempt_state()
87 	struct a5xx_gpu *a5xx_gpu = from_timer(a5xx_gpu, t, preempt_timer);  in a5xx_preempt_timer()  local
88 	struct msm_gpu *gpu = &a5xx_gpu->base.base;  in a5xx_preempt_timer()
92 	if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_FAULTED))  in a5xx_preempt_timer()
103 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_trigger()  local
114 	if (!try_preempt_state(a5xx_gpu, PREEMPT_NONE, PREEMPT_START))  in a5xx_preempt_trigger()
124 	if (!ring || (a5xx_gpu->cur_ring == ring)) {  in a5xx_preempt_trigger()
137 		set_preempt_state(a5xx_gpu, PREEMPT_ABORT);  in a5xx_preempt_trigger()
138 		update_wptr(gpu, a5xx_gpu->cur_ring);  in a5xx_preempt_trigger()
139 		set_preempt_state(a5xx_gpu, PREEMPT_NONE);  in a5xx_preempt_trigger()
145 	a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring);  in a5xx_preempt_trigger()
151 		a5xx_gpu->preempt_iova[ring->id]);  in a5xx_preempt_trigger()
153 	a5xx_gpu->next_ring = ring;  in a5xx_preempt_trigger()
156 	mod_timer(&a5xx_gpu->preempt_timer, jiffies + msecs_to_jiffies(10000));  in a5xx_preempt_trigger()
159 	set_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED);  in a5xx_preempt_trigger()
172 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_irq()  local
176 	if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_PENDING))  in a5xx_preempt_irq()
180 	del_timer(&a5xx_gpu->preempt_timer);  in a5xx_preempt_irq()
190 		set_preempt_state(a5xx_gpu, PREEMPT_FAULTED);  in a5xx_preempt_irq()
197 	a5xx_gpu->cur_ring = a5xx_gpu->next_ring;  in a5xx_preempt_irq()
198 	a5xx_gpu->next_ring = NULL;  in a5xx_preempt_irq()
200 	update_wptr(gpu, a5xx_gpu->cur_ring);  in a5xx_preempt_irq()
202 	set_preempt_state(a5xx_gpu, PREEMPT_NONE);  in a5xx_preempt_irq()
208 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_hw_init()  local
212 		a5xx_gpu->preempt[i]->wptr = 0;  in a5xx_preempt_hw_init()
213 		a5xx_gpu->preempt[i]->rptr = 0;  in a5xx_preempt_hw_init()
214 		a5xx_gpu->preempt[i]->rbase = gpu->rb[i]->iova;  in a5xx_preempt_hw_init()
222 	set_preempt_state(a5xx_gpu, PREEMPT_NONE);  in a5xx_preempt_hw_init()
225 	a5xx_gpu->cur_ring = gpu->rb[0];  in a5xx_preempt_hw_init()
228 static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu,  in preempt_init_ring()  argument
231 	struct adreno_gpu *adreno_gpu = &a5xx_gpu->base;  in preempt_init_ring()
244 	a5xx_gpu->preempt_bo[ring->id] = bo;  in preempt_init_ring()
245 	a5xx_gpu->preempt_iova[ring->id] = iova;  in preempt_init_ring()
246 	a5xx_gpu->preempt[ring->id] = ptr;  in preempt_init_ring()
263 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_fini()  local
267 		if (!a5xx_gpu->preempt_bo[i])  in a5xx_preempt_fini()
270 		msm_gem_put_vaddr(a5xx_gpu->preempt_bo[i]);  in a5xx_preempt_fini()
272 		if (a5xx_gpu->preempt_iova[i])  in a5xx_preempt_fini()
273 			msm_gem_put_iova(a5xx_gpu->preempt_bo[i], gpu->aspace);  in a5xx_preempt_fini()
275 		drm_gem_object_unreference(a5xx_gpu->preempt_bo[i]);  in a5xx_preempt_fini()
276 		a5xx_gpu->preempt_bo[i] = NULL;  in a5xx_preempt_fini()
283 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);  in a5xx_preempt_init()  local
291 		if (preempt_init_ring(a5xx_gpu, gpu->rb[i])) {  in a5xx_preempt_init()
303 	timer_setup(&a5xx_gpu->preempt_timer, a5xx_preempt_timer, 0);  in a5xx_preempt_init()