251 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x5800023d);  in meson_venci_cvbs_clock_config()
252 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00404e00);  in meson_venci_cvbs_clock_config()
253 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091);  in meson_venci_cvbs_clock_config()
254 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c);  in meson_venci_cvbs_clock_config()
255 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980);  in meson_venci_cvbs_clock_config()
256 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55);  in meson_venci_cvbs_clock_config()
257 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4800023d);  in meson_venci_cvbs_clock_config()
260 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4000027b);  in meson_venci_cvbs_clock_config()
261 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb300);  in meson_venci_cvbs_clock_config()
262 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0xa6212844);  in meson_venci_cvbs_clock_config()
263 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c4d000c);  in meson_venci_cvbs_clock_config()
264 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729);  in meson_venci_cvbs_clock_config()
265 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500);  in meson_venci_cvbs_clock_config()
431 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000200 | m);  in meson_hdmi_pll_set_params()
433 			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2,  in meson_hdmi_pll_set_params()
436 			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2,  in meson_hdmi_pll_set_params()
438 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091);  in meson_hdmi_pll_set_params()
439 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c);  in meson_hdmi_pll_set_params()
440 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980);  in meson_hdmi_pll_set_params()
441 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55);  in meson_hdmi_pll_set_params()
452 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x40000200 | m);  in meson_hdmi_pll_set_params()
453 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb000 | frac);  in meson_hdmi_pll_set_params()
454 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4);  in meson_hdmi_pll_set_params()
455 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000);  in meson_hdmi_pll_set_params()
456 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729);  in meson_hdmi_pll_set_params()
457 		regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500);  in meson_hdmi_pll_set_params()