304 				     struct intel_crtc_state *pipe_config,  in intel_dsi_compute_config()  argument
311 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);  in intel_dsi_compute_config()
313 	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;  in intel_dsi_compute_config()
322 			intel_gmch_panel_fitting(crtc, pipe_config,  in intel_dsi_compute_config()
325 			intel_pch_panel_fitting(crtc, pipe_config,  in intel_dsi_compute_config()
342 			pipe_config->cpu_transcoder = TRANSCODER_DSI_C;  in intel_dsi_compute_config()
344 			pipe_config->cpu_transcoder = TRANSCODER_DSI_A;  in intel_dsi_compute_config()
346 		ret = bxt_dsi_pll_compute(encoder, pipe_config);  in intel_dsi_compute_config()
350 		ret = vlv_dsi_pll_compute(encoder, pipe_config);  in intel_dsi_compute_config()
355 	pipe_config->clock_set = true;  in intel_dsi_compute_config()
745 			      const struct intel_crtc_state *pipe_config);
797 				 const struct intel_crtc_state *pipe_config,  in intel_dsi_pre_enable()  argument
801 	struct drm_crtc *crtc = pipe_config->base.crtc;  in intel_dsi_pre_enable()
819 		bxt_dsi_pll_enable(encoder, pipe_config);  in intel_dsi_pre_enable()
822 		vlv_dsi_pll_enable(encoder, pipe_config);  in intel_dsi_pre_enable()
846 		intel_dsi_prepare(encoder, pipe_config);  in intel_dsi_pre_enable()
862 			intel_dsi_prepare(encoder, pipe_config);  in intel_dsi_pre_enable()
870 		intel_dsi_prepare(encoder, pipe_config);  in intel_dsi_pre_enable()
890 		intel_dsi_port_enable(encoder, pipe_config);  in intel_dsi_pre_enable()
893 	intel_panel_enable_backlight(pipe_config, conn_state);  in intel_dsi_pre_enable()
902 				 const struct intel_crtc_state *pipe_config,  in intel_dsi_enable_nop()  argument
948 				   const struct intel_crtc_state *pipe_config,  in intel_dsi_post_disable()  argument
1091 				    struct intel_crtc_state *pipe_config)  in bxt_dsi_get_pipe_config()  argument
1096 					&pipe_config->base.adjusted_mode;  in bxt_dsi_get_pipe_config()
1098 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);  in bxt_dsi_get_pipe_config()
1121 	pipe_config->pipe_bpp =  in bxt_dsi_get_pipe_config()
1124 	bpp = pipe_config->pipe_bpp;  in bxt_dsi_get_pipe_config()
1252 				 struct intel_crtc_state *pipe_config)  in intel_dsi_get_config()  argument
1258 	pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);  in intel_dsi_get_config()
1261 		bxt_dsi_get_pipe_config(encoder, pipe_config);  in intel_dsi_get_config()
1262 		pclk = bxt_dsi_get_pclk(encoder, pipe_config->pipe_bpp,  in intel_dsi_get_config()
1263 					pipe_config);  in intel_dsi_get_config()
1265 		pclk = vlv_dsi_get_pclk(encoder, pipe_config->pipe_bpp,  in intel_dsi_get_config()
1266 					pipe_config);  in intel_dsi_get_config()
1270 		pipe_config->base.adjusted_mode.crtc_clock = pclk;  in intel_dsi_get_config()
1271 		pipe_config->port_clock = pclk;  in intel_dsi_get_config()
1401 			      const struct intel_crtc_state *pipe_config)  in intel_dsi_prepare()  argument
1406 	struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);  in intel_dsi_prepare()
1408 	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;  in intel_dsi_prepare()