Lines Matching refs:tv_ctl
990 u32 tv_ctl; in intel_tv_pre_enable() local
1002 tv_ctl = I915_READ(TV_CTL); in intel_tv_pre_enable()
1003 tv_ctl &= TV_CTL_SAVE; in intel_tv_pre_enable()
1009 tv_ctl |= TV_ENC_OUTPUT_COMPOSITE; in intel_tv_pre_enable()
1015 tv_ctl |= TV_ENC_OUTPUT_COMPONENT; in intel_tv_pre_enable()
1024 tv_ctl |= TV_ENC_OUTPUT_SVIDEO; in intel_tv_pre_enable()
1031 tv_ctl |= TV_ENC_PIPE_SEL(intel_crtc->pipe); in intel_tv_pre_enable()
1032 tv_ctl |= tv_mode->oversample; in intel_tv_pre_enable()
1035 tv_ctl |= TV_PROGRESSIVE; in intel_tv_pre_enable()
1037 tv_ctl |= TV_TRILEVEL_SYNC; in intel_tv_pre_enable()
1039 tv_ctl |= TV_PAL_BURST; in intel_tv_pre_enable()
1061 tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX; in intel_tv_pre_enable()
1110 I915_WRITE(TV_CTL, tv_ctl); in intel_tv_pre_enable()
1138 u32 tv_ctl, save_tv_ctl; in intel_tv_detect_type() local
1152 save_tv_ctl = tv_ctl = I915_READ(TV_CTL); in intel_tv_detect_type()
1155 tv_ctl &= ~(TV_ENC_ENABLE | TV_ENC_PIPE_SEL_MASK | TV_TEST_MODE_MASK); in intel_tv_detect_type()
1156 tv_ctl |= TV_TEST_MODE_MONITOR_DETECT; in intel_tv_detect_type()
1157 tv_ctl |= TV_ENC_PIPE_SEL(intel_crtc->pipe); in intel_tv_detect_type()
1178 I915_WRITE(TV_CTL, tv_ctl); in intel_tv_detect_type()
1186 DRM_DEBUG_KMS("TV detected: %x, %x\n", tv_ctl, tv_dac); in intel_tv_detect_type()