Lines Matching refs:mbox_reg

676 		i915_reg_t mbox_reg;  in gen6_signal()  local
681 mbox_reg = rq->engine->semaphore.mbox.signal[engine->hw_id]; in gen6_signal()
682 if (i915_mmio_reg_valid(mbox_reg)) { in gen6_signal()
684 *cs++ = i915_mmio_reg_offset(mbox_reg); in gen6_signal()
2082 i915_reg_t mbox_reg; in intel_ring_init_semaphores() member
2085 [VCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_RV, .mbox_reg = GEN6_VRSYNC }, in intel_ring_init_semaphores()
2086 [BCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_RB, .mbox_reg = GEN6_BRSYNC }, in intel_ring_init_semaphores()
2087 [VECS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_RVE, .mbox_reg = GEN6_VERSYNC }, in intel_ring_init_semaphores()
2090 [RCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VR, .mbox_reg = GEN6_RVSYNC }, in intel_ring_init_semaphores()
2091 [BCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VB, .mbox_reg = GEN6_BVSYNC }, in intel_ring_init_semaphores()
2092 [VECS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VVE, .mbox_reg = GEN6_VEVSYNC }, in intel_ring_init_semaphores()
2095 [RCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_BR, .mbox_reg = GEN6_RBSYNC }, in intel_ring_init_semaphores()
2096 [VCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_BV, .mbox_reg = GEN6_VBSYNC }, in intel_ring_init_semaphores()
2097 [VECS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_BVE, .mbox_reg = GEN6_VEBSYNC }, in intel_ring_init_semaphores()
2100 [RCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VER, .mbox_reg = GEN6_RVESYNC }, in intel_ring_init_semaphores()
2101 [VCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VEV, .mbox_reg = GEN6_VVESYNC }, in intel_ring_init_semaphores()
2102 [BCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VEB, .mbox_reg = GEN6_BVESYNC }, in intel_ring_init_semaphores()
2106 i915_reg_t mbox_reg; in intel_ring_init_semaphores() local
2110 mbox_reg = GEN6_NOSYNC; in intel_ring_init_semaphores()
2113 mbox_reg = sem_data[engine->hw_id][i].mbox_reg; in intel_ring_init_semaphores()
2117 engine->semaphore.mbox.signal[i] = mbox_reg; in intel_ring_init_semaphores()