800 	return dev_priv->wm.max_level + 1;  in intel_wm_num_levels()
1046 	dev_priv->wm.max_level = G4X_WM_LEVEL_HPLL;  in g4x_setup_wm_latency()
1278 	if (level > dev_priv->wm.max_level)  in g4x_raw_crtc_wm_is_valid()
1591 	dev_priv->wm.max_level = VLV_WM_LEVEL_PM2;  in vlv_setup_wm_latency()
1597 		dev_priv->wm.max_level = VLV_WM_LEVEL_DDR_DVFS;  in vlv_setup_wm_latency()
2092 	wm->level = dev_priv->wm.max_level;  in vlv_merge_wm()
2805 		int level, max_level = ilk_wm_max_level(dev_priv);  in intel_read_wm_latency()  local
2853 		for (level = 1; level <= max_level; level++) {  in intel_read_wm_latency()
2855 				for (i = level + 1; i <= max_level; i++)  in intel_read_wm_latency()
2870 			for (level = 1; level <= max_level; level++) {  in intel_read_wm_latency()
2939 	int level, max_level = ilk_wm_max_level(dev_priv);  in intel_print_wm_latency()  local
2941 	for (level = 0; level <= max_level; level++) {  in intel_print_wm_latency()
2968 	int level, max_level = ilk_wm_max_level(dev_priv);  in ilk_increase_wm_latency()  local
2974 	for (level = 1; level <= max_level; level++)  in ilk_increase_wm_latency()
3063 	int level, max_level = ilk_wm_max_level(dev_priv), usable_level;  in ilk_compute_pipe_wm()  local
3087 	usable_level = max_level;  in ilk_compute_pipe_wm()
3144 	int level, max_level = ilk_wm_max_level(to_i915(dev));  in ilk_compute_intermediate_wm()  local
3159 	for (level = 0; level <= max_level; level++) {  in ilk_compute_intermediate_wm()
3231 	int level, max_level = ilk_wm_max_level(dev_priv);  in ilk_wm_merge()  local
3232 	int last_enabled_level = max_level;  in ilk_wm_merge()
3243 	for (level = 1; level <= max_level; level++) {  in ilk_wm_merge()
3273 		for (level = 2; level <= max_level; level++) {  in ilk_wm_merge()
3372 	int level, max_level = ilk_wm_max_level(to_i915(dev));  in ilk_find_best_result()  local
3375 	for (level = 1; level <= max_level; level++) {  in ilk_find_best_result()
4751 	int level, max_level = ilk_wm_max_level(dev_priv);  in skl_compute_wm_levels()  local
4762 	for (level = 0; level <= max_level; level++) {  in skl_compute_wm_levels()
4968 	int level, max_level = ilk_wm_max_level(dev_priv);  in skl_write_plane_wm()  local
4971 	for (level = 0; level <= max_level; level++) {  in skl_write_plane_wm()
5004 	int level, max_level = ilk_wm_max_level(dev_priv);  in skl_write_cursor_wm()  local
5007 	for (level = 0; level <= max_level; level++) {  in skl_write_cursor_wm()
5481 	int level, max_level;  in skl_pipe_wm_get_hw_state()  local
5485 	max_level = ilk_wm_max_level(dev_priv);  in skl_pipe_wm_get_hw_state()
5490 		for (level = 0; level <= max_level; level++) {  in skl_pipe_wm_get_hw_state()
5584 		int level, max_level = ilk_wm_max_level(dev_priv);  in ilk_pipe_wm_get_hw_state()  local
5591 		for (level = 0; level <= max_level; level++)  in ilk_pipe_wm_get_hw_state()
5722 		int level, max_level;  in g4x_wm_get_hw_state()  local
5737 			max_level = G4X_WM_LEVEL_HPLL;  in g4x_wm_get_hw_state()
5739 			max_level = G4X_WM_LEVEL_SR;  in g4x_wm_get_hw_state()
5741 			max_level = G4X_WM_LEVEL_NORMAL;  in g4x_wm_get_hw_state()
5748 		if (++level > max_level)  in g4x_wm_get_hw_state()
5757 		if (++level > max_level)  in g4x_wm_get_hw_state()
5882 			dev_priv->wm.max_level = VLV_WM_LEVEL_PM5;  in vlv_wm_get_hw_state()