446 		dev_priv->wm.vlv.cxsr = enable;  in intel_set_memory_cxsr()
448 		dev_priv->wm.g4x.cxsr = enable;  in intel_set_memory_cxsr()
1298 		wm_state->cxsr = false;  in g4x_invalidate_wms()
1360 	wm_state->cxsr = num_active_planes == BIT(PLANE_PRIMARY);  in g4x_compute_pipe_wm()
1372 	wm_state->hpll_en = wm_state->cxsr;  in g4x_compute_pipe_wm()
1417 		intermediate->cxsr = false;  in g4x_compute_intermediate_wm()
1422 	intermediate->cxsr = optimal->cxsr && active->cxsr &&  in g4x_compute_intermediate_wm()
1455 		intermediate->cxsr);  in g4x_compute_intermediate_wm()
1463 		intermediate->fbc_en && intermediate->cxsr);  in g4x_compute_intermediate_wm()
1484 	wm->cxsr = true;  in g4x_merge_wm()
1494 		if (!wm_state->cxsr)  in g4x_merge_wm()
1495 			wm->cxsr = false;  in g4x_merge_wm()
1505 		wm->cxsr = false;  in g4x_merge_wm()
1515 		if (crtc->active && wm->cxsr)  in g4x_merge_wm()
1532 	if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))  in g4x_program_watermarks()
1537 	if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))  in g4x_program_watermarks()
1897 	wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1;  in vlv_compute_pipe_wm()
2050 		intermediate->cxsr = false;  in vlv_compute_intermediate_wm()
2055 	intermediate->cxsr = optimal->cxsr && active->cxsr &&  in vlv_compute_intermediate_wm()
2093 	wm->cxsr = true;  in vlv_merge_wm()
2101 		if (!wm_state->cxsr)  in vlv_merge_wm()
2102 			wm->cxsr = false;  in vlv_merge_wm()
2109 		wm->cxsr = false;  in vlv_merge_wm()
2119 		if (crtc->active && wm->cxsr)  in vlv_merge_wm()
2145 	if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))  in vlv_program_watermarks()
2150 	if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))  in vlv_program_watermarks()
5713 	wm->cxsr = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;  in g4x_wm_get_hw_state()
5724 		active->cxsr = wm->cxsr;  in g4x_wm_get_hw_state()
5736 		if (wm->cxsr && wm->hpll_en)  in g4x_wm_get_hw_state()
5738 		else if (wm->cxsr)  in g4x_wm_get_hw_state()
5787 		      yesno(wm->cxsr), yesno(wm->hpll_en), yesno(wm->fbc_en));  in g4x_wm_get_hw_state()
5855 	wm->cxsr = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;  in vlv_wm_get_hw_state()
5905 		active->cxsr = wm->cxsr;  in vlv_wm_get_hw_state()
5941 		      wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr);  in vlv_wm_get_hw_state()