509 	fifo_state->plane[PLANE_CURSOR] = 63;  in vlv_get_fifo_size()
820 	if (plane->id == PLANE_CURSOR)  in intel_wm_plane_visible()
939 		   FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |  in g4x_write_wm_values()
947 		   FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |  in g4x_write_wm_values()
970 			   (wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) |  in vlv_write_wm_values()
989 		   FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |  in vlv_write_wm_values()
994 		   FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |  in vlv_write_wm_values()
1008 			   FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC));  in vlv_write_wm_values()
1066 	case PLANE_CURSOR:  in g4x_plane_fifo_size()
1128 	if (plane->id == PLANE_CURSOR)  in g4x_compute_wm()
1133 	if (plane->id == PLANE_CURSOR) {  in g4x_compute_wm()
1283 		g4x_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);  in g4x_raw_crtc_wm_is_valid()
1319 					  ~BIT(PLANE_CURSOR));  in g4x_compute_pipe_wm()
1357 	wm_state->sr.cursor = raw->plane[PLANE_CURSOR];  in g4x_compute_pipe_wm()
1369 	wm_state->hpll.cursor = raw->plane[PLANE_CURSOR];  in g4x_compute_pipe_wm()
1454 		 g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_SR)) &&  in g4x_compute_intermediate_wm()
1459 		 g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_HPLL)) &&  in g4x_compute_intermediate_wm()
1622 	if (plane->id == PLANE_CURSOR) {  in vlv_compute_wm_level()
1650 	unsigned int active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);  in vlv_compute_fifo()
1696 	fifo_state->plane[PLANE_CURSOR] = 63;  in vlv_compute_fifo()
1789 		int max_wm = plane_id == PLANE_CURSOR ? 63 : 511;  in vlv_raw_plane_wm_compute()
1828 		vlv_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);  in vlv_raw_crtc_wm_is_valid()
1841 					  ~BIT(PLANE_CURSOR));  in vlv_compute_pipe_wm()
1874 	if (dirty & ~BIT(PLANE_CURSOR)) {  in vlv_compute_pipe_wm()
1919 			vlv_invert_wm_value(raw->plane[PLANE_CURSOR],  in vlv_compute_pipe_wm()
1954 	WARN_ON(fifo_state->plane[PLANE_CURSOR] != 63);  in vlv_atomic_update_fifo()
2125 		wm->ddl[pipe].plane[PLANE_CURSOR] = DDL_PRECISION_HIGH | 2;  in vlv_merge_wm()
3893 	if (plane_id == PLANE_CURSOR) {  in skl_ddb_get_hw_plane_state()
3980 	if (plane->id == PLANE_CURSOR) {  in skl_plane_downscale_amount()
4120 	if (intel_plane->id == PLANE_CURSOR)  in skl_plane_relative_data_rate()
4261 		if (plane_id == PLANE_CURSOR)  in skl_ddb_calc_min()
4271 	minimum[PLANE_CURSOR] = skl_cursor_allocation(num_active);  in skl_ddb_calc_min()
4336 	ddb->plane[pipe][PLANE_CURSOR].start = alloc->end - minimum[PLANE_CURSOR];  in skl_allocate_pipe_ddb()
4337 	ddb->plane[pipe][PLANE_CURSOR].end = alloc->end;  in skl_allocate_pipe_ddb()
4353 		if (plane_id == PLANE_CURSOR)  in skl_allocate_pipe_ddb()
4512 	if (plane->id == PLANE_CURSOR) {  in skl_compute_plane_wm_params()
5014 			    &ddb->plane[pipe][PLANE_CURSOR]);  in skl_write_cursor_wm()
5357 		if (plane_id != PLANE_CURSOR)  in skl_atomic_update_crtc_wm()
5491 			if (plane_id != PLANE_CURSOR)  in skl_pipe_wm_get_hw_state()
5499 		if (plane_id != PLANE_CURSOR)  in skl_pipe_wm_get_hw_state()
5610 	wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);  in g4x_read_wm_values()
5619 	wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);  in g4x_read_wm_values()
5640 		wm->ddl[pipe].plane[PLANE_CURSOR] =  in vlv_read_wm_values()
5650 	wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);  in vlv_read_wm_values()
5656 	wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);  in vlv_read_wm_values()
5673 		wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC);  in vlv_read_wm_values()
5753 		raw->plane[PLANE_CURSOR] = active->sr.cursor;  in g4x_wm_get_hw_state()
5762 		raw->plane[PLANE_CURSOR] = active->hpll.cursor;  in g4x_wm_get_hw_state()
5778 			      wm->pipe[pipe].plane[PLANE_CURSOR],  in g4x_wm_get_hw_state()
5935 			      wm->pipe[pipe].plane[PLANE_CURSOR],  in vlv_wm_get_hw_state()