2487 static uint32_t ilk_compute_pri_wm(const struct intel_crtc_state *cstate,  in ilk_compute_pri_wm()
2517 static uint32_t ilk_compute_spr_wm(const struct intel_crtc_state *cstate,  in ilk_compute_spr_wm()
2541 static uint32_t ilk_compute_cur_wm(const struct intel_crtc_state *cstate,  in ilk_compute_cur_wm()
2558 static uint32_t ilk_compute_fbc_wm(const struct intel_crtc_state *cstate,  in ilk_compute_fbc_wm()
2739 				 struct intel_crtc_state *cstate,  in ilk_compute_wm_level()
2772 hsw_compute_linetime_wm(const struct intel_crtc_state *cstate)  in hsw_compute_linetime_wm()
3051 static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)  in ilk_compute_pipe_wm()
3708 	struct intel_crtc_state *cstate;  in intel_can_enable_sagv()  local
3775 				       const struct intel_crtc_state *cstate,  in intel_get_ddb_size()
3807 				   const struct intel_crtc_state *cstate,  in skl_ddb_get_pipe_allocation_limits()
3968 skl_plane_downscale_amount(const struct intel_crtc_state *cstate,  in skl_plane_downscale_amount()
4043 				  struct intel_crtc_state *cstate)  in skl_check_pipe_max_pixel_rate()
4102 skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,  in skl_plane_relative_data_rate()
4156 	struct drm_crtc_state *cstate = &intel_cstate->base;  in skl_get_total_relative_data_rate()  local
4252 skl_ddb_calc_min(const struct intel_crtc_state *cstate, int num_active,  in skl_ddb_calc_min()
4275 skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,  in skl_allocate_pipe_ddb()
4438 intel_get_linetime_us(struct intel_crtc_state *cstate)  in intel_get_linetime_us()
4459 skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *cstate,  in skl_adjusted_plane_pixel_rate()
4482 			    struct intel_crtc_state *cstate,  in skl_compute_plane_wm_params()
4589 				struct intel_crtc_state *cstate,  in skl_compute_plane_wm()
4740 		      struct intel_crtc_state *cstate,  in skl_compute_wm_levels()
4792 skl_compute_linetime_wm(struct intel_crtc_state *cstate)  in skl_compute_linetime_wm()
4814 static void skl_compute_transition_wm(struct intel_crtc_state *cstate,  in skl_compute_transition_wm()
4869 static int skl_build_pipe_wm(struct intel_crtc_state *cstate,  in skl_build_pipe_wm()
5053 static int skl_update_pipe_wm(struct drm_crtc_state *cstate,  in skl_update_pipe_wm()
5078 	struct drm_crtc_state *cstate;  in pipes_modified()  local
5088 skl_ddb_add_affected_planes(struct intel_crtc_state *cstate)  in skl_ddb_add_affected_planes()
5126 	struct intel_crtc_state *cstate;  in skl_compute_ddb()  local
5163 	const struct drm_crtc_state *cstate;  in skl_print_wm_changes()  local
5198 	const struct drm_crtc_state *cstate;  in skl_ddb_add_affected_pipes()  local
5272 		struct intel_crtc_state *cstate;  in skl_ddb_add_affected_pipes()  local
5286 	struct drm_crtc_state *cstate;  in skl_compute_wm()  local
5342 				      struct intel_crtc_state *cstate)  in skl_atomic_update_crtc_wm()
5367 			   struct intel_crtc_state *cstate)  in skl_initial_wm()
5441 				   struct intel_crtc_state *cstate)  in ilk_initial_watermarks()
5453 				    struct intel_crtc_state *cstate)  in ilk_optimize_watermarks()
5520 	struct intel_crtc_state *cstate;  in skl_wm_get_hw_state()  local
5552 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);  in ilk_pipe_wm_get_hw_state()  local