410 execlists_update_context_pdps(struct i915_hw_ppgtt *ppgtt, u32 *reg_state)  in execlists_update_context_pdps()  argument
412 	ASSIGN_CTX_PDP(ppgtt, reg_state, 3);  in execlists_update_context_pdps()
413 	ASSIGN_CTX_PDP(ppgtt, reg_state, 2);  in execlists_update_context_pdps()
414 	ASSIGN_CTX_PDP(ppgtt, reg_state, 1);  in execlists_update_context_pdps()
415 	ASSIGN_CTX_PDP(ppgtt, reg_state, 0);  in execlists_update_context_pdps()
421 	struct i915_hw_ppgtt *ppgtt =  in execlists_update_context()  local
422 		rq->gem_context->ppgtt ?: rq->i915->mm.aliasing_ppgtt;  in execlists_update_context()
432 	if (ppgtt && !i915_vm_is_48bit(&ppgtt->vm))  in execlists_update_context()
433 		execlists_update_context_pdps(ppgtt, reg_state);  in execlists_update_context()
1994 	struct i915_hw_ppgtt *ppgtt = rq->gem_context->ppgtt;  in intel_logical_ring_emit_pdps()  local
2006 		const dma_addr_t pd_daddr = i915_page_dir_dma_addr(ppgtt, i);  in intel_logical_ring_emit_pdps()
2033 	if (rq->gem_context->ppgtt &&  in gen8_emit_bb_start()
2034 	    (intel_engine_flag(rq->engine) & rq->gem_context->ppgtt->pd_dirty_rings) &&  in gen8_emit_bb_start()
2035 	    !i915_vm_is_48bit(&rq->gem_context->ppgtt->vm) &&  in gen8_emit_bb_start()
2041 		rq->gem_context->ppgtt->pd_dirty_rings &= ~intel_engine_flag(rq->engine);  in gen8_emit_bb_start()
2572 	struct i915_hw_ppgtt *ppgtt = ctx->ppgtt ?: dev_priv->mm.aliasing_ppgtt;  in execlists_init_reg_state()  local
2642 	if (ppgtt && i915_vm_is_48bit(&ppgtt->vm)) {  in execlists_init_reg_state()
2647 		ASSIGN_CTX_PML4(ppgtt, regs);  in execlists_init_reg_state()