89 static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *dev_priv,  in get_gmbus_pin()  argument
92 	if (HAS_PCH_ICP(dev_priv))  in get_gmbus_pin()
94 	else if (HAS_PCH_CNP(dev_priv))  in get_gmbus_pin()
96 	else if (IS_GEN9_LP(dev_priv))  in get_gmbus_pin()
98 	else if (IS_GEN9_BC(dev_priv))  in get_gmbus_pin()
100 	else if (IS_BROADWELL(dev_priv))  in get_gmbus_pin()
106 bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,  in intel_gmbus_is_valid_pin()  argument
111 	if (HAS_PCH_ICP(dev_priv))  in intel_gmbus_is_valid_pin()
113 	else if (HAS_PCH_CNP(dev_priv))  in intel_gmbus_is_valid_pin()
115 	else if (IS_GEN9_LP(dev_priv))  in intel_gmbus_is_valid_pin()
117 	else if (IS_GEN9_BC(dev_priv))  in intel_gmbus_is_valid_pin()
119 	else if (IS_BROADWELL(dev_priv))  in intel_gmbus_is_valid_pin()
125 		i915_mmio_reg_valid(get_gmbus_pin(dev_priv, pin)->reg);  in intel_gmbus_is_valid_pin()
139 intel_i2c_reset(struct drm_i915_private *dev_priv)  in intel_i2c_reset()  argument
145 static void pnv_gmbus_clock_gating(struct drm_i915_private *dev_priv,  in pnv_gmbus_clock_gating()  argument
159 static void pch_gmbus_clock_gating(struct drm_i915_private *dev_priv,  in pch_gmbus_clock_gating()  argument
172 static void bxt_gmbus_clock_gating(struct drm_i915_private *dev_priv,  in bxt_gmbus_clock_gating()  argument
187 	struct drm_i915_private *dev_priv = bus->dev_priv;  in get_reserved()  local
191 	if (!IS_I830(dev_priv) && !IS_I845G(dev_priv))  in get_reserved()
202 	struct drm_i915_private *dev_priv = bus->dev_priv;  in get_clock()  local
212 	struct drm_i915_private *dev_priv = bus->dev_priv;  in get_data()  local
222 	struct drm_i915_private *dev_priv = bus->dev_priv;  in set_clock()  local
239 	struct drm_i915_private *dev_priv = bus->dev_priv;  in set_data()  local
259 	struct drm_i915_private *dev_priv = bus->dev_priv;  in intel_gpio_pre_xfer()  local
261 	intel_i2c_reset(dev_priv);  in intel_gpio_pre_xfer()
263 	if (IS_PINEVIEW(dev_priv))  in intel_gpio_pre_xfer()
264 		pnv_gmbus_clock_gating(dev_priv, false);  in intel_gpio_pre_xfer()
278 	struct drm_i915_private *dev_priv = bus->dev_priv;  in intel_gpio_post_xfer()  local
283 	if (IS_PINEVIEW(dev_priv))  in intel_gpio_post_xfer()
284 		pnv_gmbus_clock_gating(dev_priv, true);  in intel_gpio_post_xfer()
290 	struct drm_i915_private *dev_priv = bus->dev_priv;  in intel_gpio_setup()  local
295 	bus->gpio_reg = _MMIO(dev_priv->gpio_mmio_base +  in intel_gpio_setup()
296 			      i915_mmio_reg_offset(get_gmbus_pin(dev_priv, pin)->reg));  in intel_gpio_setup()
309 static int gmbus_wait(struct drm_i915_private *dev_priv, u32 status, u32 irq_en)  in gmbus_wait()  argument
319 	if (!HAS_GMBUS_IRQ(dev_priv))  in gmbus_wait()
322 	add_wait_queue(&dev_priv->gmbus_wait_queue, &wait);  in gmbus_wait()
331 	remove_wait_queue(&dev_priv->gmbus_wait_queue, &wait);  in gmbus_wait()
340 gmbus_wait_idle(struct drm_i915_private *dev_priv)  in gmbus_wait_idle()  argument
348 	if (HAS_GMBUS_IRQ(dev_priv))  in gmbus_wait_idle()
351 	add_wait_queue(&dev_priv->gmbus_wait_queue, &wait);  in gmbus_wait_idle()
354 	ret = intel_wait_for_register_fw(dev_priv,  in gmbus_wait_idle()
359 	remove_wait_queue(&dev_priv->gmbus_wait_queue, &wait);  in gmbus_wait_idle()
365 unsigned int gmbus_max_xfer_size(struct drm_i915_private *dev_priv)  in gmbus_max_xfer_size()  argument
367 	return INTEL_GEN(dev_priv) >= 9 ? GEN9_GMBUS_BYTE_COUNT_MAX :  in gmbus_max_xfer_size()
372 gmbus_xfer_read_chunk(struct drm_i915_private *dev_priv,  in gmbus_xfer_read_chunk()  argument
377 	bool burst_read = len > gmbus_max_xfer_size(dev_priv);  in gmbus_xfer_read_chunk()
403 		ret = gmbus_wait(dev_priv, GMBUS_HW_RDY, GMBUS_HW_RDY_EN);  in gmbus_xfer_read_chunk()
435 gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,  in gmbus_xfer_read()  argument
444 		if (HAS_GMBUS_BURST_READ(dev_priv))  in gmbus_xfer_read()
447 			len = min(rx_size, gmbus_max_xfer_size(dev_priv));  in gmbus_xfer_read()
449 		ret = gmbus_xfer_read_chunk(dev_priv, msg->addr, buf, len,  in gmbus_xfer_read()
462 gmbus_xfer_write_chunk(struct drm_i915_private *dev_priv,  in gmbus_xfer_write_chunk()  argument
491 		ret = gmbus_wait(dev_priv, GMBUS_HW_RDY, GMBUS_HW_RDY_EN);  in gmbus_xfer_write_chunk()
500 gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg,  in gmbus_xfer_write()  argument
509 		len = min(tx_size, gmbus_max_xfer_size(dev_priv));  in gmbus_xfer_write()
511 		ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len,  in gmbus_xfer_write()
538 gmbus_index_xfer(struct drm_i915_private *dev_priv, struct i2c_msg *msgs,  in gmbus_index_xfer()  argument
557 		ret = gmbus_xfer_read(dev_priv, &msgs[1], gmbus0_reg,  in gmbus_index_xfer()
560 		ret = gmbus_xfer_write(dev_priv, &msgs[1], gmbus1_index);  in gmbus_index_xfer()
576 	struct drm_i915_private *dev_priv = bus->dev_priv;  in do_gmbus_xfer()  local
581 	if (IS_GEN9_LP(dev_priv))  in do_gmbus_xfer()
582 		bxt_gmbus_clock_gating(dev_priv, false);  in do_gmbus_xfer()
583 	else if (HAS_PCH_SPT(dev_priv) ||  in do_gmbus_xfer()
584 		 HAS_PCH_KBP(dev_priv) || HAS_PCH_CNP(dev_priv))  in do_gmbus_xfer()
585 		pch_gmbus_clock_gating(dev_priv, false);  in do_gmbus_xfer()
593 			ret = gmbus_index_xfer(dev_priv, &msgs[i],  in do_gmbus_xfer()
597 			ret = gmbus_xfer_read(dev_priv, &msgs[i],  in do_gmbus_xfer()
600 			ret = gmbus_xfer_write(dev_priv, &msgs[i], 0);  in do_gmbus_xfer()
604 			ret = gmbus_wait(dev_priv,  in do_gmbus_xfer()
622 	if (gmbus_wait_idle(dev_priv)) {  in do_gmbus_xfer()
646 	if (gmbus_wait_idle(dev_priv)) {  in do_gmbus_xfer()
691 	if (IS_GEN9_LP(dev_priv))  in do_gmbus_xfer()
692 		bxt_gmbus_clock_gating(dev_priv, true);  in do_gmbus_xfer()
693 	else if (HAS_PCH_SPT(dev_priv) ||  in do_gmbus_xfer()
694 		 HAS_PCH_KBP(dev_priv) || HAS_PCH_CNP(dev_priv))  in do_gmbus_xfer()
695 		pch_gmbus_clock_gating(dev_priv, true);  in do_gmbus_xfer()
705 	struct drm_i915_private *dev_priv = bus->dev_priv;  in gmbus_xfer()  local
708 	intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);  in gmbus_xfer()
720 	intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);  in gmbus_xfer()
729 	struct drm_i915_private *dev_priv = bus->dev_priv;  in intel_gmbus_output_aksv()  local
748 	intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);  in intel_gmbus_output_aksv()
749 	mutex_lock(&dev_priv->gmbus_mutex);  in intel_gmbus_output_aksv()
758 	mutex_unlock(&dev_priv->gmbus_mutex);  in intel_gmbus_output_aksv()
759 	intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);  in intel_gmbus_output_aksv()
782 	struct drm_i915_private *dev_priv = bus->dev_priv;  in gmbus_lock_bus()  local
784 	mutex_lock(&dev_priv->gmbus_mutex);  in gmbus_lock_bus()
791 	struct drm_i915_private *dev_priv = bus->dev_priv;  in gmbus_trylock_bus()  local
793 	return mutex_trylock(&dev_priv->gmbus_mutex);  in gmbus_trylock_bus()
800 	struct drm_i915_private *dev_priv = bus->dev_priv;  in gmbus_unlock_bus()  local
802 	mutex_unlock(&dev_priv->gmbus_mutex);  in gmbus_unlock_bus()
815 int intel_setup_gmbus(struct drm_i915_private *dev_priv)  in intel_setup_gmbus()  argument
817 	struct pci_dev *pdev = dev_priv->drm.pdev;  in intel_setup_gmbus()
822 	if (INTEL_INFO(dev_priv)->num_pipes == 0)  in intel_setup_gmbus()
825 	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))  in intel_setup_gmbus()
826 		dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE;  in intel_setup_gmbus()
827 	else if (!HAS_GMCH_DISPLAY(dev_priv))  in intel_setup_gmbus()
828 		dev_priv->gpio_mmio_base =  in intel_setup_gmbus()
832 	mutex_init(&dev_priv->gmbus_mutex);  in intel_setup_gmbus()
833 	init_waitqueue_head(&dev_priv->gmbus_wait_queue);  in intel_setup_gmbus()
835 	for (pin = 0; pin < ARRAY_SIZE(dev_priv->gmbus); pin++) {  in intel_setup_gmbus()
836 		if (!intel_gmbus_is_valid_pin(dev_priv, pin))  in intel_setup_gmbus()
839 		bus = &dev_priv->gmbus[pin];  in intel_setup_gmbus()
846 			 get_gmbus_pin(dev_priv, pin)->name);  in intel_setup_gmbus()
849 		bus->dev_priv = dev_priv;  in intel_setup_gmbus()
864 		if (IS_I830(dev_priv))  in intel_setup_gmbus()
874 	intel_i2c_reset(dev_priv);  in intel_setup_gmbus()
880 		if (!intel_gmbus_is_valid_pin(dev_priv, pin))  in intel_setup_gmbus()
883 		bus = &dev_priv->gmbus[pin];  in intel_setup_gmbus()
889 struct i2c_adapter *intel_gmbus_get_adapter(struct drm_i915_private *dev_priv,  in intel_gmbus_get_adapter()  argument
892 	if (WARN_ON(!intel_gmbus_is_valid_pin(dev_priv, pin)))  in intel_gmbus_get_adapter()
895 	return &dev_priv->gmbus[pin].adapter;  in intel_gmbus_get_adapter()
908 	struct drm_i915_private *dev_priv = bus->dev_priv;  in intel_gmbus_force_bit()  local
910 	mutex_lock(&dev_priv->gmbus_mutex);  in intel_gmbus_force_bit()
917 	mutex_unlock(&dev_priv->gmbus_mutex);  in intel_gmbus_force_bit()
920 void intel_teardown_gmbus(struct drm_i915_private *dev_priv)  in intel_teardown_gmbus()  argument
925 	for (pin = 0; pin < ARRAY_SIZE(dev_priv->gmbus); pin++) {  in intel_teardown_gmbus()
926 		if (!intel_gmbus_is_valid_pin(dev_priv, pin))  in intel_teardown_gmbus()
929 		bus = &dev_priv->gmbus[pin];  in intel_teardown_gmbus()