Lines Matching refs:dev_priv

44 static inline bool fbc_supported(struct drm_i915_private *dev_priv)  in fbc_supported()  argument
46 return HAS_FBC(dev_priv); in fbc_supported()
49 static inline bool no_fbc_on_multiple_pipes(struct drm_i915_private *dev_priv) in no_fbc_on_multiple_pipes() argument
51 return INTEL_GEN(dev_priv) <= 3; in no_fbc_on_multiple_pipes()
81 static int intel_fbc_calculate_cfb_size(struct drm_i915_private *dev_priv, in intel_fbc_calculate_cfb_size() argument
87 if (INTEL_GEN(dev_priv) == 7) in intel_fbc_calculate_cfb_size()
89 else if (INTEL_GEN(dev_priv) >= 8) in intel_fbc_calculate_cfb_size()
96 static void i8xx_fbc_deactivate(struct drm_i915_private *dev_priv) in i8xx_fbc_deactivate() argument
109 if (intel_wait_for_register(dev_priv, in i8xx_fbc_deactivate()
117 static void i8xx_fbc_activate(struct drm_i915_private *dev_priv) in i8xx_fbc_activate() argument
119 struct intel_fbc_reg_params *params = &dev_priv->fbc.params; in i8xx_fbc_activate()
130 if (IS_GEN2(dev_priv)) in i8xx_fbc_activate()
139 if (IS_GEN4(dev_priv)) { in i8xx_fbc_activate()
153 if (IS_I945GM(dev_priv)) in i8xx_fbc_activate()
160 static bool i8xx_fbc_is_active(struct drm_i915_private *dev_priv) in i8xx_fbc_is_active() argument
165 static void g4x_fbc_activate(struct drm_i915_private *dev_priv) in g4x_fbc_activate() argument
167 struct intel_fbc_reg_params *params = &dev_priv->fbc.params; in g4x_fbc_activate()
187 static void g4x_fbc_deactivate(struct drm_i915_private *dev_priv) in g4x_fbc_deactivate() argument
199 static bool g4x_fbc_is_active(struct drm_i915_private *dev_priv) in g4x_fbc_is_active() argument
205 static void intel_fbc_recompress(struct drm_i915_private *dev_priv) in intel_fbc_recompress() argument
211 static void ilk_fbc_activate(struct drm_i915_private *dev_priv) in ilk_fbc_activate() argument
213 struct intel_fbc_reg_params *params = &dev_priv->fbc.params; in ilk_fbc_activate()
215 int threshold = dev_priv->fbc.threshold; in ilk_fbc_activate()
236 if (IS_GEN5(dev_priv)) in ilk_fbc_activate()
238 if (IS_GEN6(dev_priv)) { in ilk_fbc_activate()
246 if (IS_GEN6(dev_priv)) { in ilk_fbc_activate()
258 intel_fbc_recompress(dev_priv); in ilk_fbc_activate()
261 static void ilk_fbc_deactivate(struct drm_i915_private *dev_priv) in ilk_fbc_deactivate() argument
273 static bool ilk_fbc_is_active(struct drm_i915_private *dev_priv) in ilk_fbc_is_active() argument
278 static void gen7_fbc_activate(struct drm_i915_private *dev_priv) in gen7_fbc_activate() argument
280 struct intel_fbc_reg_params *params = &dev_priv->fbc.params; in gen7_fbc_activate()
282 int threshold = dev_priv->fbc.threshold; in gen7_fbc_activate()
285 if (IS_GEN9(dev_priv) && !IS_GEMINILAKE(dev_priv)) { in gen7_fbc_activate()
298 if (IS_IVYBRIDGE(dev_priv)) in gen7_fbc_activate()
328 if (dev_priv->fbc.false_color) in gen7_fbc_activate()
331 if (IS_IVYBRIDGE(dev_priv)) { in gen7_fbc_activate()
336 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in gen7_fbc_activate()
345 intel_fbc_recompress(dev_priv); in gen7_fbc_activate()
348 static bool intel_fbc_hw_is_active(struct drm_i915_private *dev_priv) in intel_fbc_hw_is_active() argument
350 if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_hw_is_active()
351 return ilk_fbc_is_active(dev_priv); in intel_fbc_hw_is_active()
352 else if (IS_GM45(dev_priv)) in intel_fbc_hw_is_active()
353 return g4x_fbc_is_active(dev_priv); in intel_fbc_hw_is_active()
355 return i8xx_fbc_is_active(dev_priv); in intel_fbc_hw_is_active()
358 static void intel_fbc_hw_activate(struct drm_i915_private *dev_priv) in intel_fbc_hw_activate() argument
360 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_hw_activate()
364 if (INTEL_GEN(dev_priv) >= 7) in intel_fbc_hw_activate()
365 gen7_fbc_activate(dev_priv); in intel_fbc_hw_activate()
366 else if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_hw_activate()
367 ilk_fbc_activate(dev_priv); in intel_fbc_hw_activate()
368 else if (IS_GM45(dev_priv)) in intel_fbc_hw_activate()
369 g4x_fbc_activate(dev_priv); in intel_fbc_hw_activate()
371 i8xx_fbc_activate(dev_priv); in intel_fbc_hw_activate()
374 static void intel_fbc_hw_deactivate(struct drm_i915_private *dev_priv) in intel_fbc_hw_deactivate() argument
376 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_hw_deactivate()
380 if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_hw_deactivate()
381 ilk_fbc_deactivate(dev_priv); in intel_fbc_hw_deactivate()
382 else if (IS_GM45(dev_priv)) in intel_fbc_hw_deactivate()
383 g4x_fbc_deactivate(dev_priv); in intel_fbc_hw_deactivate()
385 i8xx_fbc_deactivate(dev_priv); in intel_fbc_hw_deactivate()
397 bool intel_fbc_is_active(struct drm_i915_private *dev_priv) in intel_fbc_is_active() argument
399 return dev_priv->fbc.active; in intel_fbc_is_active()
402 static void intel_fbc_deactivate(struct drm_i915_private *dev_priv, in intel_fbc_deactivate() argument
405 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_deactivate()
410 intel_fbc_hw_deactivate(dev_priv); in intel_fbc_deactivate()
418 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in multiple_pipes_ok() local
419 struct intel_fbc *fbc = &dev_priv->fbc; in multiple_pipes_ok()
423 if (!no_fbc_on_multiple_pipes(dev_priv)) in multiple_pipes_ok()
434 static int find_compression_threshold(struct drm_i915_private *dev_priv, in find_compression_threshold() argument
447 if (IS_BROADWELL(dev_priv) || IS_GEN9_BC(dev_priv)) in find_compression_threshold()
448 end = resource_size(&dev_priv->dsm) - 8 * 1024 * 1024; in find_compression_threshold()
460 ret = i915_gem_stolen_insert_node_in_range(dev_priv, node, size <<= 1, in find_compression_threshold()
471 ret = i915_gem_stolen_insert_node_in_range(dev_priv, node, size >>= 1, in find_compression_threshold()
473 if (ret && INTEL_GEN(dev_priv) <= 4) { in find_compression_threshold()
485 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fbc_alloc_cfb() local
486 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_alloc_cfb()
492 size = intel_fbc_calculate_cfb_size(dev_priv, &fbc->state_cache); in intel_fbc_alloc_cfb()
495 ret = find_compression_threshold(dev_priv, &fbc->compressed_fb, in intel_fbc_alloc_cfb()
506 if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_alloc_cfb()
508 else if (IS_GM45(dev_priv)) { in intel_fbc_alloc_cfb()
515 ret = i915_gem_stolen_insert_node(dev_priv, compressed_llb, in intel_fbc_alloc_cfb()
522 GEM_BUG_ON(range_overflows_t(u64, dev_priv->dsm.start, in intel_fbc_alloc_cfb()
525 GEM_BUG_ON(range_overflows_t(u64, dev_priv->dsm.start, in intel_fbc_alloc_cfb()
529 dev_priv->dsm.start + fbc->compressed_fb.start); in intel_fbc_alloc_cfb()
531 dev_priv->dsm.start + compressed_llb->start); in intel_fbc_alloc_cfb()
541 i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_fb); in intel_fbc_alloc_cfb()
543 if (drm_mm_initialized(&dev_priv->mm.stolen)) in intel_fbc_alloc_cfb()
548 static void __intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv) in __intel_fbc_cleanup_cfb() argument
550 struct intel_fbc *fbc = &dev_priv->fbc; in __intel_fbc_cleanup_cfb()
553 i915_gem_stolen_remove_node(dev_priv, &fbc->compressed_fb); in __intel_fbc_cleanup_cfb()
556 i915_gem_stolen_remove_node(dev_priv, fbc->compressed_llb); in __intel_fbc_cleanup_cfb()
561 void intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv) in intel_fbc_cleanup_cfb() argument
563 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_cleanup_cfb()
565 if (!fbc_supported(dev_priv)) in intel_fbc_cleanup_cfb()
569 __intel_fbc_cleanup_cfb(dev_priv); in intel_fbc_cleanup_cfb()
573 static bool stride_is_valid(struct drm_i915_private *dev_priv, in stride_is_valid() argument
584 if (IS_GEN2(dev_priv) || IS_GEN3(dev_priv)) in stride_is_valid()
587 if (IS_GEN4(dev_priv) && !IS_G4X(dev_priv) && stride < 2048) in stride_is_valid()
596 static bool pixel_format_is_valid(struct drm_i915_private *dev_priv, in pixel_format_is_valid() argument
606 if (IS_GEN2(dev_priv)) in pixel_format_is_valid()
609 if (IS_G4X(dev_priv)) in pixel_format_is_valid()
625 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fbc_hw_tracking_covers_screen() local
626 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_hw_tracking_covers_screen()
629 if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv)) { in intel_fbc_hw_tracking_covers_screen()
632 } else if (IS_G4X(dev_priv) || INTEL_GEN(dev_priv) >= 5) { in intel_fbc_hw_tracking_covers_screen()
652 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fbc_update_state_cache() local
653 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_update_state_cache()
661 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_fbc_update_state_cache()
691 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fbc_can_activate() local
692 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_can_activate()
735 if (INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv) && in intel_fbc_can_activate()
741 if (!stride_is_valid(dev_priv, cache->fb.stride)) { in intel_fbc_can_activate()
746 if (!pixel_format_is_valid(dev_priv, cache->fb.format->format)) { in intel_fbc_can_activate()
752 if ((IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) && in intel_fbc_can_activate()
753 cache->crtc.hsw_bdw_pixel_rate >= dev_priv->cdclk.hw.cdclk * 95 / 100) { in intel_fbc_can_activate()
768 if (intel_fbc_calculate_cfb_size(dev_priv, &fbc->state_cache) > in intel_fbc_can_activate()
779 if (IS_GEN(dev_priv, 9, 10) && in intel_fbc_can_activate()
788 static bool intel_fbc_can_enable(struct drm_i915_private *dev_priv) in intel_fbc_can_enable() argument
790 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_can_enable()
792 if (intel_vgpu_active(dev_priv)) { in intel_fbc_can_enable()
813 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fbc_get_reg_params() local
814 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_get_reg_params()
832 params->cfb_size = intel_fbc_calculate_cfb_size(dev_priv, cache); in intel_fbc_get_reg_params()
834 if (IS_GEN9(dev_priv) && !IS_GEMINILAKE(dev_priv)) in intel_fbc_get_reg_params()
843 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fbc_pre_update() local
844 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_pre_update()
847 if (!fbc_supported(dev_priv)) in intel_fbc_pre_update()
864 intel_fbc_deactivate(dev_priv, reason); in intel_fbc_pre_update()
876 static void __intel_fbc_disable(struct drm_i915_private *dev_priv) in __intel_fbc_disable() argument
878 struct intel_fbc *fbc = &dev_priv->fbc; in __intel_fbc_disable()
887 __intel_fbc_cleanup_cfb(dev_priv); in __intel_fbc_disable()
895 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in __intel_fbc_post_update() local
896 struct intel_fbc *fbc = &dev_priv->fbc; in __intel_fbc_post_update()
907 intel_fbc_deactivate(dev_priv, "disabled at runtime per module param"); in __intel_fbc_post_update()
908 __intel_fbc_disable(dev_priv); in __intel_fbc_post_update()
919 intel_fbc_deactivate(dev_priv, "FBC enabled (active or scheduled)"); in __intel_fbc_post_update()
920 intel_fbc_hw_activate(dev_priv); in __intel_fbc_post_update()
922 intel_fbc_deactivate(dev_priv, "frontbuffer write"); in __intel_fbc_post_update()
927 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fbc_post_update() local
928 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_post_update()
930 if (!fbc_supported(dev_priv)) in intel_fbc_post_update()
946 void intel_fbc_invalidate(struct drm_i915_private *dev_priv, in intel_fbc_invalidate() argument
950 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_invalidate()
952 if (!fbc_supported(dev_priv)) in intel_fbc_invalidate()
963 intel_fbc_deactivate(dev_priv, "frontbuffer write"); in intel_fbc_invalidate()
968 void intel_fbc_flush(struct drm_i915_private *dev_priv, in intel_fbc_flush() argument
971 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_flush()
973 if (!fbc_supported(dev_priv)) in intel_fbc_flush()
986 intel_fbc_recompress(dev_priv); in intel_fbc_flush()
1007 void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv, in intel_fbc_choose_crtc() argument
1010 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_choose_crtc()
1023 if (!intel_fbc_can_enable(dev_priv)) in intel_fbc_choose_crtc()
1069 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fbc_enable() local
1070 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_enable()
1072 if (!fbc_supported(dev_priv)) in intel_fbc_enable()
1115 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fbc_disable() local
1116 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_disable()
1118 if (!fbc_supported(dev_priv)) in intel_fbc_disable()
1125 __intel_fbc_disable(dev_priv); in intel_fbc_disable()
1135 void intel_fbc_global_disable(struct drm_i915_private *dev_priv) in intel_fbc_global_disable() argument
1137 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_global_disable()
1139 if (!fbc_supported(dev_priv)) in intel_fbc_global_disable()
1145 __intel_fbc_disable(dev_priv); in intel_fbc_global_disable()
1152 struct drm_i915_private *dev_priv = in intel_fbc_underrun_work_fn() local
1154 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_underrun_work_fn()
1165 intel_fbc_deactivate(dev_priv, "FIFO underrun"); in intel_fbc_underrun_work_fn()
1177 int intel_fbc_reset_underrun(struct drm_i915_private *dev_priv) in intel_fbc_reset_underrun() argument
1181 cancel_work_sync(&dev_priv->fbc.underrun_work); in intel_fbc_reset_underrun()
1183 ret = mutex_lock_interruptible(&dev_priv->fbc.lock); in intel_fbc_reset_underrun()
1187 if (dev_priv->fbc.underrun_detected) { in intel_fbc_reset_underrun()
1189 dev_priv->fbc.no_fbc_reason = "FIFO underrun cleared"; in intel_fbc_reset_underrun()
1192 dev_priv->fbc.underrun_detected = false; in intel_fbc_reset_underrun()
1193 mutex_unlock(&dev_priv->fbc.lock); in intel_fbc_reset_underrun()
1212 void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *dev_priv) in intel_fbc_handle_fifo_underrun_irq() argument
1214 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_handle_fifo_underrun_irq()
1216 if (!fbc_supported(dev_priv)) in intel_fbc_handle_fifo_underrun_irq()
1239 void intel_fbc_init_pipe_state(struct drm_i915_private *dev_priv) in intel_fbc_init_pipe_state() argument
1244 if (!no_fbc_on_multiple_pipes(dev_priv)) in intel_fbc_init_pipe_state()
1247 for_each_intel_crtc(&dev_priv->drm, crtc) in intel_fbc_init_pipe_state()
1250 dev_priv->fbc.visible_pipes_mask |= (1 << crtc->pipe); in intel_fbc_init_pipe_state()
1262 static int intel_sanitize_fbc_option(struct drm_i915_private *dev_priv) in intel_sanitize_fbc_option() argument
1267 if (!HAS_FBC(dev_priv)) in intel_sanitize_fbc_option()
1270 if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) in intel_sanitize_fbc_option()
1276 static bool need_fbc_vtd_wa(struct drm_i915_private *dev_priv) in need_fbc_vtd_wa() argument
1280 (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))) { in need_fbc_vtd_wa()
1294 void intel_fbc_init(struct drm_i915_private *dev_priv) in intel_fbc_init() argument
1296 struct intel_fbc *fbc = &dev_priv->fbc; in intel_fbc_init()
1303 if (need_fbc_vtd_wa(dev_priv)) in intel_fbc_init()
1304 mkwrite_device_info(dev_priv)->has_fbc = false; in intel_fbc_init()
1306 i915_modparams.enable_fbc = intel_sanitize_fbc_option(dev_priv); in intel_fbc_init()
1310 if (!HAS_FBC(dev_priv)) { in intel_fbc_init()
1316 if (INTEL_GEN(dev_priv) <= 4 && !IS_GM45(dev_priv)) in intel_fbc_init()
1322 if (intel_fbc_hw_is_active(dev_priv)) in intel_fbc_init()
1323 intel_fbc_hw_deactivate(dev_priv); in intel_fbc_init()