1231 			struct skl_wrpll_params *wrpll_params)  in skl_ddi_calculate_wrpll()  argument
1296 	skl_wrpll_params_populate(wrpll_params, afe_clock, ctx.central_freq,  in skl_ddi_calculate_wrpll()
1307 	struct skl_wrpll_params wrpll_params = { 0, };  in skl_ddi_hdmi_pll_dividers()  local
1317 	if (!skl_ddi_calculate_wrpll(clock * 1000, &wrpll_params))  in skl_ddi_hdmi_pll_dividers()
1321 		DPLL_CFGCR1_DCO_FRACTION(wrpll_params.dco_fraction) |  in skl_ddi_hdmi_pll_dividers()
1322 		wrpll_params.dco_integer;  in skl_ddi_hdmi_pll_dividers()
1324 	cfgcr2 = DPLL_CFGCR2_QDIV_RATIO(wrpll_params.qdiv_ratio) |  in skl_ddi_hdmi_pll_dividers()
1325 		DPLL_CFGCR2_QDIV_MODE(wrpll_params.qdiv_mode) |  in skl_ddi_hdmi_pll_dividers()
1326 		DPLL_CFGCR2_KDIV(wrpll_params.kdiv) |  in skl_ddi_hdmi_pll_dividers()
1327 		DPLL_CFGCR2_PDIV(wrpll_params.pdiv) |  in skl_ddi_hdmi_pll_dividers()
1328 		wrpll_params.central_freq;  in skl_ddi_hdmi_pll_dividers()
2218 			struct skl_wrpll_params *wrpll_params)  in cnl_ddi_calculate_wrpll()  argument
2263 	cnl_wrpll_params_populate(wrpll_params, best_dco, ref_clock, pdiv, qdiv,  in cnl_ddi_calculate_wrpll()
2275 	struct skl_wrpll_params wrpll_params = { 0, };  in cnl_ddi_hdmi_pll_dividers()  local
2279 	if (!cnl_ddi_calculate_wrpll(clock, dev_priv, &wrpll_params))  in cnl_ddi_hdmi_pll_dividers()
2282 	cfgcr0 |= DPLL_CFGCR0_DCO_FRACTION(wrpll_params.dco_fraction) |  in cnl_ddi_hdmi_pll_dividers()
2283 		wrpll_params.dco_integer;  in cnl_ddi_hdmi_pll_dividers()
2285 	cfgcr1 = DPLL_CFGCR1_QDIV_RATIO(wrpll_params.qdiv_ratio) |  in cnl_ddi_hdmi_pll_dividers()
2286 		DPLL_CFGCR1_QDIV_MODE(wrpll_params.qdiv_mode) |  in cnl_ddi_hdmi_pll_dividers()
2287 		DPLL_CFGCR1_KDIV(wrpll_params.kdiv) |  in cnl_ddi_hdmi_pll_dividers()
2288 		DPLL_CFGCR1_PDIV(wrpll_params.pdiv) |  in cnl_ddi_hdmi_pll_dividers()