2499 				struct intel_dpll_hw_state *pll_state)  in icl_calc_dpll_state()  argument
2523 	pll_state->cfgcr0 = cfgcr0;  in icl_calc_dpll_state()
2524 	pll_state->cfgcr1 = cfgcr1;  in icl_calc_dpll_state()
2684 				  struct intel_dpll_hw_state *pll_state)  in icl_calc_mg_pll_state()  argument
2698 				      pll_state)) {  in icl_calc_mg_pll_state()
2787 	pll_state->mg_pll_div0 = (m2div_rem > 0 ? MG_PLL_DIV0_FRACNEN_H : 0) |  in icl_calc_mg_pll_state()
2791 	pll_state->mg_pll_div1 = MG_PLL_DIV1_IREF_NDIVRATIO(iref_ndiv) |  in icl_calc_mg_pll_state()
2796 	pll_state->mg_pll_lf = MG_PLL_LF_TDCTARGETCNT(tdc_targetcnt) |  in icl_calc_mg_pll_state()
2802 	pll_state->mg_pll_frac_lock = MG_PLL_FRAC_LOCK_TRUELOCK_CRIT_32 |  in icl_calc_mg_pll_state()
2808 		pll_state->mg_pll_frac_lock |= MG_PLL_FRAC_LOCK_FEEDFWRDCAL_EN;  in icl_calc_mg_pll_state()
2810 	pll_state->mg_pll_ssc = (use_ssc ? MG_PLL_SSC_EN : 0) |  in icl_calc_mg_pll_state()
2817 	pll_state->mg_pll_tdc_coldst_bias = MG_PLL_TDC_COLDST_COLDSTART |  in icl_calc_mg_pll_state()
2823 	pll_state->mg_pll_bias = MG_PLL_BIAS_BIAS_GB_SEL(3) |  in icl_calc_mg_pll_state()
2832 		pll_state->mg_pll_tdc_coldst_bias_mask = MG_PLL_TDC_COLDST_COLDSTART;  in icl_calc_mg_pll_state()
2833 		pll_state->mg_pll_bias_mask = 0;  in icl_calc_mg_pll_state()
2835 		pll_state->mg_pll_tdc_coldst_bias_mask = -1U;  in icl_calc_mg_pll_state()
2836 		pll_state->mg_pll_bias_mask = -1U;  in icl_calc_mg_pll_state()
2839 	pll_state->mg_pll_tdc_coldst_bias &= pll_state->mg_pll_tdc_coldst_bias_mask;  in icl_calc_mg_pll_state()
2840 	pll_state->mg_pll_bias &= pll_state->mg_pll_bias_mask;  in icl_calc_mg_pll_state()
2850 	struct intel_dpll_hw_state pll_state = {};  in icl_get_dpll()  local
2862 					  &pll_state);  in icl_get_dpll()
2872 						  &pll_state);  in icl_get_dpll()
2877 						    &pll_state);  in icl_get_dpll()
2890 	crtc_state->dpll_hw_state = pll_state;  in icl_get_dpll()