1988 	val = pll->state.hw_state.cfgcr0;  in cnl_ddi_pll_enable()
1996 	if (pll->state.hw_state.cfgcr0 & DPLL_CFGCR0_HDMI_MODE) {  in cnl_ddi_pll_enable()
2114 	hw_state->cfgcr0 = val;  in cnl_ddi_pll_get_hw_state()
2274 	uint32_t cfgcr0, cfgcr1;  in cnl_ddi_hdmi_pll_dividers()  local
2277 	cfgcr0 = DPLL_CFGCR0_HDMI_MODE;  in cnl_ddi_hdmi_pll_dividers()
2282 	cfgcr0 |= DPLL_CFGCR0_DCO_FRACTION(wrpll_params.dco_fraction) |  in cnl_ddi_hdmi_pll_dividers()
2294 	crtc_state->dpll_hw_state.cfgcr0 = cfgcr0;  in cnl_ddi_hdmi_pll_dividers()
2303 	uint32_t cfgcr0;  in cnl_ddi_dp_set_dpll_hw_state()  local
2305 	cfgcr0 = DPLL_CFGCR0_SSC_ENABLE;  in cnl_ddi_dp_set_dpll_hw_state()
2309 		cfgcr0 |= DPLL_CFGCR0_LINK_RATE_810;  in cnl_ddi_dp_set_dpll_hw_state()
2312 		cfgcr0 |= DPLL_CFGCR0_LINK_RATE_1350;  in cnl_ddi_dp_set_dpll_hw_state()
2315 		cfgcr0 |= DPLL_CFGCR0_LINK_RATE_2700;  in cnl_ddi_dp_set_dpll_hw_state()
2319 		cfgcr0 |= DPLL_CFGCR0_LINK_RATE_1620;  in cnl_ddi_dp_set_dpll_hw_state()
2322 		cfgcr0 |= DPLL_CFGCR0_LINK_RATE_1080;  in cnl_ddi_dp_set_dpll_hw_state()
2325 		cfgcr0 |= DPLL_CFGCR0_LINK_RATE_2160;  in cnl_ddi_dp_set_dpll_hw_state()
2329 		cfgcr0 |= DPLL_CFGCR0_LINK_RATE_3240;  in cnl_ddi_dp_set_dpll_hw_state()
2333 		cfgcr0 |= DPLL_CFGCR0_LINK_RATE_4050;  in cnl_ddi_dp_set_dpll_hw_state()
2337 	dpll_hw_state->cfgcr0 = cfgcr0;  in cnl_ddi_dp_set_dpll_hw_state()
2389 		      hw_state->cfgcr0,  in cnl_dump_hw_state()
2502 	uint32_t cfgcr0, cfgcr1;  in icl_calc_dpll_state()  local
2514 	cfgcr0 = DPLL_CFGCR0_DCO_FRACTION(pll_params.dco_fraction) |  in icl_calc_dpll_state()
2523 	pll_state->cfgcr0 = cfgcr0;  in icl_calc_dpll_state()
2531 	uint32_t cfgcr0, cfgcr1;  in icl_calc_dp_combo_pll_link()  local
2537 	cfgcr0 = I915_READ(ICL_DPLL_CFGCR0(pll_id));  in icl_calc_dp_combo_pll_link()
2540 	dco_integer = cfgcr0 & DPLL_CFGCR0_DCO_INTEGER_MASK;  in icl_calc_dp_combo_pll_link()
2541 	dco_fraction = (cfgcr0 & DPLL_CFGCR0_DCO_FRACTION_MASK) >>  in icl_calc_dp_combo_pll_link()
2942 		hw_state->cfgcr0 = I915_READ(ICL_DPLL_CFGCR0(id));  in icl_pll_get_hw_state()
3003 	I915_WRITE(ICL_DPLL_CFGCR0(id), hw_state->cfgcr0);  in icl_dpll_write()
3157 		      hw_state->cfgcr0, hw_state->cfgcr1,  in icl_dump_hw_state()