Lines Matching refs:I915_WRITE
367 I915_WRITE(PCH_FP0(id), pll->state.hw_state.fp0); in ibx_pch_dpll_prepare()
368 I915_WRITE(PCH_FP1(id), pll->state.hw_state.fp1); in ibx_pch_dpll_prepare()
392 I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()
403 I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()
421 I915_WRITE(PCH_DPLL(id), 0); in ibx_pch_dpll_disable()
480 I915_WRITE(WRPLL_CTL(id), pll->state.hw_state.wrpll); in hsw_ddi_wrpll_enable()
488 I915_WRITE(SPLL_CTL, pll->state.hw_state.spll); in hsw_ddi_spll_enable()
500 I915_WRITE(WRPLL_CTL(id), val & ~WRPLL_PLL_ENABLE); in hsw_ddi_wrpll_disable()
510 I915_WRITE(SPLL_CTL, val & ~SPLL_PLL_ENABLE); in hsw_ddi_spll_disable()
940 I915_WRITE(DPLL_CTRL1, val); in skl_ddi_pll_write_ctrl1()
952 I915_WRITE(regs[id].cfgcr1, pll->state.hw_state.cfgcr1); in skl_ddi_pll_enable()
953 I915_WRITE(regs[id].cfgcr2, pll->state.hw_state.cfgcr2); in skl_ddi_pll_enable()
958 I915_WRITE(regs[id].ctl, in skl_ddi_pll_enable()
982 I915_WRITE(regs[id].ctl, in skl_ddi_pll_disable()
1455 I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp); in bxt_ddi_pll_enable()
1460 I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp); in bxt_ddi_pll_enable()
1470 I915_WRITE(BXT_PORT_PLL_EBB_4(phy, ch), temp); in bxt_ddi_pll_enable()
1476 I915_WRITE(BXT_PORT_PLL_EBB_0(phy, ch), temp); in bxt_ddi_pll_enable()
1482 I915_WRITE(BXT_PORT_PLL(phy, ch, 0), temp); in bxt_ddi_pll_enable()
1488 I915_WRITE(BXT_PORT_PLL(phy, ch, 1), temp); in bxt_ddi_pll_enable()
1494 I915_WRITE(BXT_PORT_PLL(phy, ch, 2), temp); in bxt_ddi_pll_enable()
1500 I915_WRITE(BXT_PORT_PLL(phy, ch, 3), temp); in bxt_ddi_pll_enable()
1508 I915_WRITE(BXT_PORT_PLL(phy, ch, 6), temp); in bxt_ddi_pll_enable()
1514 I915_WRITE(BXT_PORT_PLL(phy, ch, 8), temp); in bxt_ddi_pll_enable()
1519 I915_WRITE(BXT_PORT_PLL(phy, ch, 9), temp); in bxt_ddi_pll_enable()
1525 I915_WRITE(BXT_PORT_PLL(phy, ch, 10), temp); in bxt_ddi_pll_enable()
1530 I915_WRITE(BXT_PORT_PLL_EBB_4(phy, ch), temp); in bxt_ddi_pll_enable()
1533 I915_WRITE(BXT_PORT_PLL_EBB_4(phy, ch), temp); in bxt_ddi_pll_enable()
1538 I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp); in bxt_ddi_pll_enable()
1548 I915_WRITE(BXT_PORT_TX_DW5_GRP(phy, ch), temp); in bxt_ddi_pll_enable()
1559 I915_WRITE(BXT_PORT_PCS_DW12_GRP(phy, ch), temp); in bxt_ddi_pll_enable()
1570 I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp); in bxt_ddi_pll_disable()
1576 I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp); in bxt_ddi_pll_disable()
1974 I915_WRITE(CNL_DPLL_ENABLE(id), val); in cnl_ddi_pll_enable()
1989 I915_WRITE(CNL_DPLL_CFGCR0(id), val); in cnl_ddi_pll_enable()
1998 I915_WRITE(CNL_DPLL_CFGCR1(id), val); in cnl_ddi_pll_enable()
2015 I915_WRITE(CNL_DPLL_ENABLE(id), val); in cnl_ddi_pll_enable()
2063 I915_WRITE(CNL_DPLL_ENABLE(id), val); in cnl_ddi_pll_disable()
2085 I915_WRITE(CNL_DPLL_ENABLE(id), val); in cnl_ddi_pll_disable()
3003 I915_WRITE(ICL_DPLL_CFGCR0(id), hw_state->cfgcr0); in icl_dpll_write()
3004 I915_WRITE(ICL_DPLL_CFGCR1(id), hw_state->cfgcr1); in icl_dpll_write()
3024 I915_WRITE(MG_REFCLKIN_CTL(port), val); in icl_mg_pll_write()
3029 I915_WRITE(MG_CLKTOP2_CORECLKCTL1(port), val); in icl_mg_pll_write()
3037 I915_WRITE(MG_CLKTOP2_HSCLKCTL(port), val); in icl_mg_pll_write()
3039 I915_WRITE(MG_PLL_DIV0(port), hw_state->mg_pll_div0); in icl_mg_pll_write()
3040 I915_WRITE(MG_PLL_DIV1(port), hw_state->mg_pll_div1); in icl_mg_pll_write()
3041 I915_WRITE(MG_PLL_LF(port), hw_state->mg_pll_lf); in icl_mg_pll_write()
3042 I915_WRITE(MG_PLL_FRAC_LOCK(port), hw_state->mg_pll_frac_lock); in icl_mg_pll_write()
3043 I915_WRITE(MG_PLL_SSC(port), hw_state->mg_pll_ssc); in icl_mg_pll_write()
3048 I915_WRITE(MG_PLL_BIAS(port), val); in icl_mg_pll_write()
3053 I915_WRITE(MG_PLL_TDC_COLDST_BIAS(port), val); in icl_mg_pll_write()
3067 I915_WRITE(enable_reg, val); in icl_pll_enable()
3101 I915_WRITE(enable_reg, val); in icl_pll_enable()
3127 I915_WRITE(enable_reg, val); in icl_pll_disable()
3137 I915_WRITE(enable_reg, val); in icl_pll_disable()