292 		&dev_priv->vbt.ddi_port_info[dig_port->base.port];  in intel_dp_set_source_rates()
677 	int backlight_controller = dev_priv->vbt.backlight.controller;  in bxt_power_sequencer_idx()
1318 		&dev_priv->vbt.ddi_port_info[port];  in intel_aux_ch()
1678 		    dev_priv->vbt.edp.bpp && dev_priv->vbt.edp.bpp < bpp) {  in intel_dp_compute_bpp()
1680 				      dev_priv->vbt.edp.bpp);  in intel_dp_compute_bpp()
1681 			bpp = dev_priv->vbt.edp.bpp;  in intel_dp_compute_bpp()
2764 	if (intel_dp_is_edp(intel_dp) && dev_priv->vbt.edp.bpp &&  in intel_dp_get_config()
2765 	    pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {  in intel_dp_get_config()
2780 			      pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp);  in intel_dp_get_config()
2781 		dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;  in intel_dp_get_config()
5453 	struct edp_power_seq cur, vbt, spec,  in intel_dp_init_panel_power_sequencer()  local
5466 	vbt = dev_priv->vbt.edp.pps;  in intel_dp_init_panel_power_sequencer()
5473 		vbt.t11_t12 = max_t(u16, vbt.t11_t12, 1300 * 10);  in intel_dp_init_panel_power_sequencer()
5475 			      vbt.t11_t12);  in intel_dp_init_panel_power_sequencer()
5481 	vbt.t11_t12 += 100 * 10;  in intel_dp_init_panel_power_sequencer()
5495 	intel_pps_dump_state("vbt", &vbt);  in intel_dp_init_panel_power_sequencer()
5499 #define assign_final(field)	final->field = (max(cur.field, vbt.field) == 0 ? \  in intel_dp_init_panel_power_sequencer()
5501 				       max(cur.field, vbt.field))  in intel_dp_init_panel_power_sequencer()
6002 	if (dev_priv->vbt.drrs_type != SEAMLESS_DRRS_SUPPORT) {  in intel_dp_drrs_init()
6015 	dev_priv->drrs.type = dev_priv->vbt.drrs_type;  in intel_dp_drrs_init()
6094 	if (!fixed_mode && dev_priv->vbt.lfp_lvds_vbt_mode) {  in intel_edp_init_connector()
6096 					dev_priv->vbt.lfp_lvds_vbt_mode);  in intel_edp_init_connector()