Lines Matching refs:intel_dp
103 bool intel_dp_is_edp(struct intel_dp *intel_dp) in intel_dp_is_edp() argument
105 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_is_edp()
110 static struct drm_device *intel_dp_to_dev(struct intel_dp *intel_dp) in intel_dp_to_dev() argument
112 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_to_dev()
117 static struct intel_dp *intel_attached_dp(struct drm_connector *connector) in intel_attached_dp()
124 static bool edp_panel_vdd_on(struct intel_dp *intel_dp);
125 static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
130 static void intel_dp_unset_edid(struct intel_dp *intel_dp);
133 static void intel_dp_set_sink_rates(struct intel_dp *intel_dp) in intel_dp_set_sink_rates() argument
140 max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in intel_dp_set_sink_rates()
145 intel_dp->sink_rates[i] = dp_rates[i]; in intel_dp_set_sink_rates()
148 intel_dp->num_sink_rates = i; in intel_dp_set_sink_rates()
166 static int intel_dp_common_len_rate_limit(const struct intel_dp *intel_dp, in intel_dp_common_len_rate_limit() argument
169 return intel_dp_rate_limit_len(intel_dp->common_rates, in intel_dp_common_len_rate_limit()
170 intel_dp->num_common_rates, max_rate); in intel_dp_common_len_rate_limit()
174 static int intel_dp_max_common_rate(struct intel_dp *intel_dp) in intel_dp_max_common_rate() argument
176 return intel_dp->common_rates[intel_dp->num_common_rates - 1]; in intel_dp_max_common_rate()
180 static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp) in intel_dp_max_common_lane_count() argument
182 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_max_common_lane_count()
184 int sink_max = drm_dp_max_lane_count(intel_dp->dpcd); in intel_dp_max_common_lane_count()
189 int intel_dp_max_lane_count(struct intel_dp *intel_dp) in intel_dp_max_lane_count() argument
191 return intel_dp->max_link_lane_count; in intel_dp_max_lane_count()
214 intel_dp_downstream_max_dotclock(struct intel_dp *intel_dp) in intel_dp_downstream_max_dotclock() argument
216 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_downstream_max_dotclock()
222 int type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK; in intel_dp_downstream_max_dotclock()
227 ds_max_dotclk = drm_dp_downstream_max_clock(intel_dp->dpcd, in intel_dp_downstream_max_dotclock()
228 intel_dp->downstream_ports); in intel_dp_downstream_max_dotclock()
236 static int cnl_max_source_rate(struct intel_dp *intel_dp) in cnl_max_source_rate() argument
238 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in cnl_max_source_rate()
259 static int icl_max_source_rate(struct intel_dp *intel_dp) in icl_max_source_rate() argument
261 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in icl_max_source_rate()
271 intel_dp_set_source_rates(struct intel_dp *intel_dp) in intel_dp_set_source_rates() argument
289 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_source_rates()
297 WARN_ON(intel_dp->source_rates || intel_dp->num_source_rates); in intel_dp_set_source_rates()
303 max_rate = cnl_max_source_rate(intel_dp); in intel_dp_set_source_rates()
305 max_rate = icl_max_source_rate(intel_dp); in intel_dp_set_source_rates()
329 intel_dp->source_rates = source_rates; in intel_dp_set_source_rates()
330 intel_dp->num_source_rates = size; in intel_dp_set_source_rates()
368 static void intel_dp_set_common_rates(struct intel_dp *intel_dp) in intel_dp_set_common_rates() argument
370 WARN_ON(!intel_dp->num_source_rates || !intel_dp->num_sink_rates); in intel_dp_set_common_rates()
372 intel_dp->num_common_rates = intersect_rates(intel_dp->source_rates, in intel_dp_set_common_rates()
373 intel_dp->num_source_rates, in intel_dp_set_common_rates()
374 intel_dp->sink_rates, in intel_dp_set_common_rates()
375 intel_dp->num_sink_rates, in intel_dp_set_common_rates()
376 intel_dp->common_rates); in intel_dp_set_common_rates()
379 if (WARN_ON(intel_dp->num_common_rates == 0)) { in intel_dp_set_common_rates()
380 intel_dp->common_rates[0] = 162000; in intel_dp_set_common_rates()
381 intel_dp->num_common_rates = 1; in intel_dp_set_common_rates()
385 static bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate, in intel_dp_link_params_valid() argument
394 link_rate > intel_dp->max_link_rate) in intel_dp_link_params_valid()
398 lane_count > intel_dp_max_lane_count(intel_dp)) in intel_dp_link_params_valid()
404 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, in intel_dp_get_link_train_fallback_values() argument
409 index = intel_dp_rate_index(intel_dp->common_rates, in intel_dp_get_link_train_fallback_values()
410 intel_dp->num_common_rates, in intel_dp_get_link_train_fallback_values()
413 intel_dp->max_link_rate = intel_dp->common_rates[index - 1]; in intel_dp_get_link_train_fallback_values()
414 intel_dp->max_link_lane_count = lane_count; in intel_dp_get_link_train_fallback_values()
416 intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp); in intel_dp_get_link_train_fallback_values()
417 intel_dp->max_link_lane_count = lane_count >> 1; in intel_dp_get_link_train_fallback_values()
430 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_mode_valid() local
440 max_dotclk = intel_dp_downstream_max_dotclock(intel_dp); in intel_dp_mode_valid()
442 if (intel_dp_is_edp(intel_dp) && fixed_mode) { in intel_dp_mode_valid()
452 max_link_clock = intel_dp_max_link_rate(intel_dp); in intel_dp_mode_valid()
453 max_lanes = intel_dp_max_lane_count(intel_dp); in intel_dp_mode_valid()
492 intel_dp_init_panel_power_sequencer(struct intel_dp *intel_dp);
494 intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
497 intel_dp_pps_init(struct intel_dp *intel_dp);
499 static void pps_lock(struct intel_dp *intel_dp) in pps_lock() argument
501 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in pps_lock()
507 intel_display_power_get(dev_priv, intel_dp->aux_power_domain); in pps_lock()
512 static void pps_unlock(struct intel_dp *intel_dp) in pps_unlock() argument
514 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in pps_unlock()
518 intel_display_power_put(dev_priv, intel_dp->aux_power_domain); in pps_unlock()
522 vlv_power_sequencer_kick(struct intel_dp *intel_dp) in vlv_power_sequencer_kick() argument
524 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in vlv_power_sequencer_kick()
525 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_power_sequencer_kick()
526 enum pipe pipe = intel_dp->pps_pipe; in vlv_power_sequencer_kick()
532 if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN, in vlv_power_sequencer_kick()
543 DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in vlv_power_sequencer_kick()
577 I915_WRITE(intel_dp->output_reg, DP); in vlv_power_sequencer_kick()
578 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
580 I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN); in vlv_power_sequencer_kick()
581 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
583 I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); in vlv_power_sequencer_kick()
584 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
604 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in vlv_find_free_pps() local
607 WARN_ON(intel_dp->active_pipe != INVALID_PIPE && in vlv_find_free_pps()
608 intel_dp->active_pipe != intel_dp->pps_pipe); in vlv_find_free_pps()
610 if (intel_dp->pps_pipe != INVALID_PIPE) in vlv_find_free_pps()
611 pipes &= ~(1 << intel_dp->pps_pipe); in vlv_find_free_pps()
613 WARN_ON(intel_dp->pps_pipe != INVALID_PIPE); in vlv_find_free_pps()
615 if (intel_dp->active_pipe != INVALID_PIPE) in vlv_find_free_pps()
616 pipes &= ~(1 << intel_dp->active_pipe); in vlv_find_free_pps()
627 vlv_power_sequencer_pipe(struct intel_dp *intel_dp) in vlv_power_sequencer_pipe() argument
629 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in vlv_power_sequencer_pipe()
630 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_power_sequencer_pipe()
636 WARN_ON(!intel_dp_is_edp(intel_dp)); in vlv_power_sequencer_pipe()
638 WARN_ON(intel_dp->active_pipe != INVALID_PIPE && in vlv_power_sequencer_pipe()
639 intel_dp->active_pipe != intel_dp->pps_pipe); in vlv_power_sequencer_pipe()
641 if (intel_dp->pps_pipe != INVALID_PIPE) in vlv_power_sequencer_pipe()
642 return intel_dp->pps_pipe; in vlv_power_sequencer_pipe()
654 intel_dp->pps_pipe = pipe; in vlv_power_sequencer_pipe()
657 pipe_name(intel_dp->pps_pipe), in vlv_power_sequencer_pipe()
661 intel_dp_init_panel_power_sequencer(intel_dp); in vlv_power_sequencer_pipe()
662 intel_dp_init_panel_power_sequencer_registers(intel_dp, true); in vlv_power_sequencer_pipe()
668 vlv_power_sequencer_kick(intel_dp); in vlv_power_sequencer_pipe()
670 return intel_dp->pps_pipe; in vlv_power_sequencer_pipe()
674 bxt_power_sequencer_idx(struct intel_dp *intel_dp) in bxt_power_sequencer_idx() argument
676 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in bxt_power_sequencer_idx()
682 WARN_ON(!intel_dp_is_edp(intel_dp)); in bxt_power_sequencer_idx()
684 if (!intel_dp->pps_reset) in bxt_power_sequencer_idx()
687 intel_dp->pps_reset = false; in bxt_power_sequencer_idx()
693 intel_dp_init_panel_power_sequencer_registers(intel_dp, false); in bxt_power_sequencer_idx()
743 vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp) in vlv_initial_power_sequencer_setup() argument
745 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in vlv_initial_power_sequencer_setup()
746 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_initial_power_sequencer_setup()
753 intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
756 if (intel_dp->pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
757 intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
760 if (intel_dp->pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
761 intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
765 if (intel_dp->pps_pipe == INVALID_PIPE) { in vlv_initial_power_sequencer_setup()
772 port_name(port), pipe_name(intel_dp->pps_pipe)); in vlv_initial_power_sequencer_setup()
774 intel_dp_init_panel_power_sequencer(intel_dp); in vlv_initial_power_sequencer_setup()
775 intel_dp_init_panel_power_sequencer_registers(intel_dp, false); in vlv_initial_power_sequencer_setup()
797 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_power_sequencer_reset() local
799 WARN_ON(intel_dp->active_pipe != INVALID_PIPE); in intel_power_sequencer_reset()
805 intel_dp->pps_reset = true; in intel_power_sequencer_reset()
807 intel_dp->pps_pipe = INVALID_PIPE; in intel_power_sequencer_reset()
819 static void intel_pps_get_registers(struct intel_dp *intel_dp, in intel_pps_get_registers() argument
822 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_pps_get_registers()
828 pps_idx = bxt_power_sequencer_idx(intel_dp); in intel_pps_get_registers()
830 pps_idx = vlv_power_sequencer_pipe(intel_dp); in intel_pps_get_registers()
842 _pp_ctrl_reg(struct intel_dp *intel_dp) in _pp_ctrl_reg() argument
846 intel_pps_get_registers(intel_dp, ®s); in _pp_ctrl_reg()
852 _pp_stat_reg(struct intel_dp *intel_dp) in _pp_stat_reg() argument
856 intel_pps_get_registers(intel_dp, ®s); in _pp_stat_reg()
866 struct intel_dp *intel_dp = container_of(this, typeof(* intel_dp), in edp_notify_handler() local
868 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in edp_notify_handler()
870 if (!intel_dp_is_edp(intel_dp) || code != SYS_RESTART) in edp_notify_handler()
873 pps_lock(intel_dp); in edp_notify_handler()
876 enum pipe pipe = vlv_power_sequencer_pipe(intel_dp); in edp_notify_handler()
888 msleep(intel_dp->panel_power_cycle_delay); in edp_notify_handler()
891 pps_unlock(intel_dp); in edp_notify_handler()
896 static bool edp_have_panel_power(struct intel_dp *intel_dp) in edp_have_panel_power() argument
898 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in edp_have_panel_power()
903 intel_dp->pps_pipe == INVALID_PIPE) in edp_have_panel_power()
906 return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0; in edp_have_panel_power()
909 static bool edp_have_panel_vdd(struct intel_dp *intel_dp) in edp_have_panel_vdd() argument
911 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in edp_have_panel_vdd()
916 intel_dp->pps_pipe == INVALID_PIPE) in edp_have_panel_vdd()
919 return I915_READ(_pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD; in edp_have_panel_vdd()
923 intel_dp_check_edp(struct intel_dp *intel_dp) in intel_dp_check_edp() argument
925 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_check_edp()
927 if (!intel_dp_is_edp(intel_dp)) in intel_dp_check_edp()
930 if (!edp_have_panel_power(intel_dp) && !edp_have_panel_vdd(intel_dp)) { in intel_dp_check_edp()
933 I915_READ(_pp_stat_reg(intel_dp)), in intel_dp_check_edp()
934 I915_READ(_pp_ctrl_reg(intel_dp))); in intel_dp_check_edp()
939 intel_dp_aux_wait_done(struct intel_dp *intel_dp) in intel_dp_aux_wait_done() argument
941 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_aux_wait_done()
942 i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp); in intel_dp_aux_wait_done()
956 static uint32_t g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in g4x_get_aux_clock_divider() argument
958 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in g4x_get_aux_clock_divider()
970 static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in ilk_get_aux_clock_divider() argument
972 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in ilk_get_aux_clock_divider()
982 if (intel_dp->aux_ch == AUX_CH_A) in ilk_get_aux_clock_divider()
988 static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in hsw_get_aux_clock_divider() argument
990 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in hsw_get_aux_clock_divider()
992 if (intel_dp->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) { in hsw_get_aux_clock_divider()
1001 return ilk_get_aux_clock_divider(intel_dp, index); in hsw_get_aux_clock_divider()
1004 static uint32_t skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in skl_get_aux_clock_divider() argument
1014 static uint32_t g4x_get_aux_send_ctl(struct intel_dp *intel_dp, in g4x_get_aux_send_ctl() argument
1018 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in g4x_get_aux_send_ctl()
1044 static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp, in skl_get_aux_send_ctl() argument
1060 intel_dp_aux_xfer(struct intel_dp *intel_dp, in intel_dp_aux_xfer() argument
1065 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_aux_xfer()
1075 ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp); in intel_dp_aux_xfer()
1077 ch_data[i] = intel_dp->aux_ch_data_reg(intel_dp, i); in intel_dp_aux_xfer()
1079 pps_lock(intel_dp); in intel_dp_aux_xfer()
1087 vdd = edp_panel_vdd_on(intel_dp); in intel_dp_aux_xfer()
1095 intel_dp_check_edp(intel_dp); in intel_dp_aux_xfer()
1125 while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) { in intel_dp_aux_xfer()
1126 u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp, in intel_dp_aux_xfer()
1143 status = intel_dp_aux_wait_done(intel_dp); in intel_dp_aux_xfer()
1221 edp_panel_vdd_off(intel_dp, false); in intel_dp_aux_xfer()
1223 pps_unlock(intel_dp); in intel_dp_aux_xfer()
1244 struct intel_dp *intel_dp = container_of(aux, struct intel_dp, aux); in intel_dp_aux_transfer() local
1266 ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize, in intel_dp_aux_transfer()
1289 ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize, in intel_dp_aux_transfer()
1312 static enum aux_ch intel_aux_ch(struct intel_dp *intel_dp) in intel_aux_ch() argument
1314 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in intel_aux_ch()
1361 intel_aux_power_domain(struct intel_dp *intel_dp) in intel_aux_power_domain() argument
1363 switch (intel_dp->aux_ch) { in intel_aux_power_domain()
1377 MISSING_CASE(intel_dp->aux_ch); in intel_aux_power_domain()
1382 static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp) in g4x_aux_ctl_reg() argument
1384 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in g4x_aux_ctl_reg()
1385 enum aux_ch aux_ch = intel_dp->aux_ch; in g4x_aux_ctl_reg()
1398 static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index) in g4x_aux_data_reg() argument
1400 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in g4x_aux_data_reg()
1401 enum aux_ch aux_ch = intel_dp->aux_ch; in g4x_aux_data_reg()
1414 static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp) in ilk_aux_ctl_reg() argument
1416 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in ilk_aux_ctl_reg()
1417 enum aux_ch aux_ch = intel_dp->aux_ch; in ilk_aux_ctl_reg()
1432 static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index) in ilk_aux_data_reg() argument
1434 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in ilk_aux_data_reg()
1435 enum aux_ch aux_ch = intel_dp->aux_ch; in ilk_aux_data_reg()
1450 static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp) in skl_aux_ctl_reg() argument
1452 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in skl_aux_ctl_reg()
1453 enum aux_ch aux_ch = intel_dp->aux_ch; in skl_aux_ctl_reg()
1469 static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index) in skl_aux_data_reg() argument
1471 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in skl_aux_data_reg()
1472 enum aux_ch aux_ch = intel_dp->aux_ch; in skl_aux_data_reg()
1489 intel_dp_aux_fini(struct intel_dp *intel_dp) in intel_dp_aux_fini() argument
1491 kfree(intel_dp->aux.name); in intel_dp_aux_fini()
1495 intel_dp_aux_init(struct intel_dp *intel_dp) in intel_dp_aux_init() argument
1497 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_aux_init()
1498 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_aux_init()
1500 intel_dp->aux_ch = intel_aux_ch(intel_dp); in intel_dp_aux_init()
1501 intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp); in intel_dp_aux_init()
1504 intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg; in intel_dp_aux_init()
1505 intel_dp->aux_ch_data_reg = skl_aux_data_reg; in intel_dp_aux_init()
1507 intel_dp->aux_ch_ctl_reg = ilk_aux_ctl_reg; in intel_dp_aux_init()
1508 intel_dp->aux_ch_data_reg = ilk_aux_data_reg; in intel_dp_aux_init()
1510 intel_dp->aux_ch_ctl_reg = g4x_aux_ctl_reg; in intel_dp_aux_init()
1511 intel_dp->aux_ch_data_reg = g4x_aux_data_reg; in intel_dp_aux_init()
1515 intel_dp->get_aux_clock_divider = skl_get_aux_clock_divider; in intel_dp_aux_init()
1517 intel_dp->get_aux_clock_divider = hsw_get_aux_clock_divider; in intel_dp_aux_init()
1519 intel_dp->get_aux_clock_divider = ilk_get_aux_clock_divider; in intel_dp_aux_init()
1521 intel_dp->get_aux_clock_divider = g4x_get_aux_clock_divider; in intel_dp_aux_init()
1524 intel_dp->get_aux_send_ctl = skl_get_aux_send_ctl; in intel_dp_aux_init()
1526 intel_dp->get_aux_send_ctl = g4x_get_aux_send_ctl; in intel_dp_aux_init()
1528 drm_dp_aux_init(&intel_dp->aux); in intel_dp_aux_init()
1531 intel_dp->aux.name = kasprintf(GFP_KERNEL, "DPDDC-%c", in intel_dp_aux_init()
1533 intel_dp->aux.transfer = intel_dp_aux_transfer; in intel_dp_aux_init()
1536 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp) in intel_dp_source_supports_hbr2() argument
1538 int max_rate = intel_dp->source_rates[intel_dp->num_source_rates - 1]; in intel_dp_source_supports_hbr2()
1543 bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp) in intel_dp_source_supports_hbr3() argument
1545 int max_rate = intel_dp->source_rates[intel_dp->num_source_rates - 1]; in intel_dp_source_supports_hbr3()
1599 static void intel_dp_print_rates(struct intel_dp *intel_dp) in intel_dp_print_rates() argument
1607 intel_dp->source_rates, intel_dp->num_source_rates); in intel_dp_print_rates()
1611 intel_dp->sink_rates, intel_dp->num_sink_rates); in intel_dp_print_rates()
1615 intel_dp->common_rates, intel_dp->num_common_rates); in intel_dp_print_rates()
1620 intel_dp_max_link_rate(struct intel_dp *intel_dp) in intel_dp_max_link_rate() argument
1624 len = intel_dp_common_len_rate_limit(intel_dp, intel_dp->max_link_rate); in intel_dp_max_link_rate()
1628 return intel_dp->common_rates[len - 1]; in intel_dp_max_link_rate()
1631 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate) in intel_dp_rate_select() argument
1633 int i = intel_dp_rate_index(intel_dp->sink_rates, in intel_dp_rate_select()
1634 intel_dp->num_sink_rates, rate); in intel_dp_rate_select()
1642 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, in intel_dp_compute_rate() argument
1646 if (intel_dp->use_rate_select) { in intel_dp_compute_rate()
1649 intel_dp_rate_select(intel_dp, port_clock); in intel_dp_compute_rate()
1662 static int intel_dp_compute_bpp(struct intel_dp *intel_dp, in intel_dp_compute_bpp() argument
1665 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_compute_bpp()
1666 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_compute_bpp()
1670 bpc = drm_dp_downstream_max_bpc(intel_dp->dpcd, intel_dp->downstream_ports); in intel_dp_compute_bpp()
1675 if (intel_dp_is_edp(intel_dp)) { in intel_dp_compute_bpp()
1690 intel_dp_adjust_compliance_config(struct intel_dp *intel_dp, in intel_dp_adjust_compliance_config() argument
1695 if (intel_dp->compliance.test_data.bpc != 0) { in intel_dp_adjust_compliance_config()
1696 int bpp = 3 * intel_dp->compliance.test_data.bpc; in intel_dp_adjust_compliance_config()
1705 if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) { in intel_dp_adjust_compliance_config()
1711 if (intel_dp_link_params_valid(intel_dp, intel_dp->compliance.test_link_rate, in intel_dp_adjust_compliance_config()
1712 intel_dp->compliance.test_lane_count)) { in intel_dp_adjust_compliance_config()
1713 index = intel_dp_rate_index(intel_dp->common_rates, in intel_dp_adjust_compliance_config()
1714 intel_dp->num_common_rates, in intel_dp_adjust_compliance_config()
1715 intel_dp->compliance.test_link_rate); in intel_dp_adjust_compliance_config()
1719 intel_dp->compliance.test_lane_count; in intel_dp_adjust_compliance_config()
1726 intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, in intel_dp_compute_link_config_wide() argument
1742 link_clock = intel_dp->common_rates[clock]; in intel_dp_compute_link_config_wide()
1765 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_compute_link_config() local
1769 common_len = intel_dp_common_len_rate_limit(intel_dp, in intel_dp_compute_link_config()
1770 intel_dp->max_link_rate); in intel_dp_compute_link_config()
1779 limits.max_lane_count = intel_dp_max_lane_count(intel_dp); in intel_dp_compute_link_config()
1782 limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config); in intel_dp_compute_link_config()
1784 if (intel_dp_is_edp(intel_dp)) { in intel_dp_compute_link_config()
1796 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits); in intel_dp_compute_link_config()
1801 intel_dp->common_rates[limits.max_clock], in intel_dp_compute_link_config()
1808 if (!intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits)) in intel_dp_compute_link_config()
1831 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_compute_config() local
1834 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_compute_config()
1837 bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc, in intel_dp_compute_config()
1847 pipe_config->has_audio = intel_dp->has_audio; in intel_dp_compute_config()
1851 if (intel_dp_is_edp(intel_dp) && intel_connector->panel.fixed_mode) { in intel_dp_compute_config()
1919 intel_psr_compute_config(intel_dp, pipe_config); in intel_dp_compute_config()
1924 void intel_dp_set_link_params(struct intel_dp *intel_dp, in intel_dp_set_link_params() argument
1928 intel_dp->link_trained = false; in intel_dp_set_link_params()
1929 intel_dp->link_rate = link_rate; in intel_dp_set_link_params()
1930 intel_dp->lane_count = lane_count; in intel_dp_set_link_params()
1931 intel_dp->link_mst = link_mst; in intel_dp_set_link_params()
1938 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_prepare() local
1943 intel_dp_set_link_params(intel_dp, pipe_config->port_clock, in intel_dp_prepare()
1968 intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in intel_dp_prepare()
1971 intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in intel_dp_prepare()
1972 intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count); in intel_dp_prepare()
1978 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
1980 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
1981 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
1983 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
1984 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
1986 intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe); in intel_dp_prepare()
1990 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
1993 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
2000 intel_dp->DP |= DP_COLOR_RANGE_16_235; in intel_dp_prepare()
2003 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
2005 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
2006 intel_dp->DP |= DP_LINK_TRAIN_OFF; in intel_dp_prepare()
2008 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
2009 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
2012 intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe); in intel_dp_prepare()
2014 intel_dp->DP |= DP_PIPE_SEL(crtc->pipe); in intel_dp_prepare()
2027 static void intel_pps_verify_state(struct intel_dp *intel_dp);
2029 static void wait_panel_status(struct intel_dp *intel_dp, in wait_panel_status() argument
2033 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in wait_panel_status()
2038 intel_pps_verify_state(intel_dp); in wait_panel_status()
2040 pp_stat_reg = _pp_stat_reg(intel_dp); in wait_panel_status()
2041 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in wait_panel_status()
2058 static void wait_panel_on(struct intel_dp *intel_dp) in wait_panel_on() argument
2061 wait_panel_status(intel_dp, IDLE_ON_MASK, IDLE_ON_VALUE); in wait_panel_on()
2064 static void wait_panel_off(struct intel_dp *intel_dp) in wait_panel_off() argument
2067 wait_panel_status(intel_dp, IDLE_OFF_MASK, IDLE_OFF_VALUE); in wait_panel_off()
2070 static void wait_panel_power_cycle(struct intel_dp *intel_dp) in wait_panel_power_cycle() argument
2080 panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->panel_power_off_time); in wait_panel_power_cycle()
2084 if (panel_power_off_duration < (s64)intel_dp->panel_power_cycle_delay) in wait_panel_power_cycle()
2086 intel_dp->panel_power_cycle_delay - panel_power_off_duration); in wait_panel_power_cycle()
2088 wait_panel_status(intel_dp, IDLE_CYCLE_MASK, IDLE_CYCLE_VALUE); in wait_panel_power_cycle()
2091 static void wait_backlight_on(struct intel_dp *intel_dp) in wait_backlight_on() argument
2093 wait_remaining_ms_from_jiffies(intel_dp->last_power_on, in wait_backlight_on()
2094 intel_dp->backlight_on_delay); in wait_backlight_on()
2097 static void edp_wait_backlight_off(struct intel_dp *intel_dp) in edp_wait_backlight_off() argument
2099 wait_remaining_ms_from_jiffies(intel_dp->last_backlight_off, in edp_wait_backlight_off()
2100 intel_dp->backlight_off_delay); in edp_wait_backlight_off()
2107 static u32 ironlake_get_pp_control(struct intel_dp *intel_dp) in ironlake_get_pp_control() argument
2109 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in ironlake_get_pp_control()
2114 control = I915_READ(_pp_ctrl_reg(intel_dp)); in ironlake_get_pp_control()
2128 static bool edp_panel_vdd_on(struct intel_dp *intel_dp) in edp_panel_vdd_on() argument
2130 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in edp_panel_vdd_on()
2131 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in edp_panel_vdd_on()
2134 bool need_to_disable = !intel_dp->want_panel_vdd; in edp_panel_vdd_on()
2138 if (!intel_dp_is_edp(intel_dp)) in edp_panel_vdd_on()
2141 cancel_delayed_work(&intel_dp->panel_vdd_work); in edp_panel_vdd_on()
2142 intel_dp->want_panel_vdd = true; in edp_panel_vdd_on()
2144 if (edp_have_panel_vdd(intel_dp)) in edp_panel_vdd_on()
2147 intel_display_power_get(dev_priv, intel_dp->aux_power_domain); in edp_panel_vdd_on()
2152 if (!edp_have_panel_power(intel_dp)) in edp_panel_vdd_on()
2153 wait_panel_power_cycle(intel_dp); in edp_panel_vdd_on()
2155 pp = ironlake_get_pp_control(intel_dp); in edp_panel_vdd_on()
2158 pp_stat_reg = _pp_stat_reg(intel_dp); in edp_panel_vdd_on()
2159 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_vdd_on()
2168 if (!edp_have_panel_power(intel_dp)) { in edp_panel_vdd_on()
2171 msleep(intel_dp->panel_power_up_delay); in edp_panel_vdd_on()
2184 void intel_edp_panel_vdd_on(struct intel_dp *intel_dp) in intel_edp_panel_vdd_on() argument
2188 if (!intel_dp_is_edp(intel_dp)) in intel_edp_panel_vdd_on()
2191 pps_lock(intel_dp); in intel_edp_panel_vdd_on()
2192 vdd = edp_panel_vdd_on(intel_dp); in intel_edp_panel_vdd_on()
2193 pps_unlock(intel_dp); in intel_edp_panel_vdd_on()
2196 port_name(dp_to_dig_port(intel_dp)->base.port)); in intel_edp_panel_vdd_on()
2199 static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp) in edp_panel_vdd_off_sync() argument
2201 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in edp_panel_vdd_off_sync()
2203 dp_to_dig_port(intel_dp); in edp_panel_vdd_off_sync()
2209 WARN_ON(intel_dp->want_panel_vdd); in edp_panel_vdd_off_sync()
2211 if (!edp_have_panel_vdd(intel_dp)) in edp_panel_vdd_off_sync()
2217 pp = ironlake_get_pp_control(intel_dp); in edp_panel_vdd_off_sync()
2220 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_vdd_off_sync()
2221 pp_stat_reg = _pp_stat_reg(intel_dp); in edp_panel_vdd_off_sync()
2231 intel_dp->panel_power_off_time = ktime_get_boottime(); in edp_panel_vdd_off_sync()
2233 intel_display_power_put(dev_priv, intel_dp->aux_power_domain); in edp_panel_vdd_off_sync()
2238 struct intel_dp *intel_dp = container_of(to_delayed_work(__work), in edp_panel_vdd_work() local
2239 struct intel_dp, panel_vdd_work); in edp_panel_vdd_work()
2241 pps_lock(intel_dp); in edp_panel_vdd_work()
2242 if (!intel_dp->want_panel_vdd) in edp_panel_vdd_work()
2243 edp_panel_vdd_off_sync(intel_dp); in edp_panel_vdd_work()
2244 pps_unlock(intel_dp); in edp_panel_vdd_work()
2247 static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp) in edp_panel_vdd_schedule_off() argument
2256 delay = msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5); in edp_panel_vdd_schedule_off()
2257 schedule_delayed_work(&intel_dp->panel_vdd_work, delay); in edp_panel_vdd_schedule_off()
2265 static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) in edp_panel_vdd_off() argument
2267 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in edp_panel_vdd_off()
2271 if (!intel_dp_is_edp(intel_dp)) in edp_panel_vdd_off()
2274 I915_STATE_WARN(!intel_dp->want_panel_vdd, "eDP port %c VDD not forced on", in edp_panel_vdd_off()
2275 port_name(dp_to_dig_port(intel_dp)->base.port)); in edp_panel_vdd_off()
2277 intel_dp->want_panel_vdd = false; in edp_panel_vdd_off()
2280 edp_panel_vdd_off_sync(intel_dp); in edp_panel_vdd_off()
2282 edp_panel_vdd_schedule_off(intel_dp); in edp_panel_vdd_off()
2285 static void edp_panel_on(struct intel_dp *intel_dp) in edp_panel_on() argument
2287 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in edp_panel_on()
2293 if (!intel_dp_is_edp(intel_dp)) in edp_panel_on()
2297 port_name(dp_to_dig_port(intel_dp)->base.port)); in edp_panel_on()
2299 if (WARN(edp_have_panel_power(intel_dp), in edp_panel_on()
2301 port_name(dp_to_dig_port(intel_dp)->base.port))) in edp_panel_on()
2304 wait_panel_power_cycle(intel_dp); in edp_panel_on()
2306 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_on()
2307 pp = ironlake_get_pp_control(intel_dp); in edp_panel_on()
2322 wait_panel_on(intel_dp); in edp_panel_on()
2323 intel_dp->last_power_on = jiffies; in edp_panel_on()
2332 void intel_edp_panel_on(struct intel_dp *intel_dp) in intel_edp_panel_on() argument
2334 if (!intel_dp_is_edp(intel_dp)) in intel_edp_panel_on()
2337 pps_lock(intel_dp); in intel_edp_panel_on()
2338 edp_panel_on(intel_dp); in intel_edp_panel_on()
2339 pps_unlock(intel_dp); in intel_edp_panel_on()
2343 static void edp_panel_off(struct intel_dp *intel_dp) in edp_panel_off() argument
2345 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in edp_panel_off()
2351 if (!intel_dp_is_edp(intel_dp)) in edp_panel_off()
2355 port_name(dp_to_dig_port(intel_dp)->base.port)); in edp_panel_off()
2357 WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n", in edp_panel_off()
2358 port_name(dp_to_dig_port(intel_dp)->base.port)); in edp_panel_off()
2360 pp = ironlake_get_pp_control(intel_dp); in edp_panel_off()
2366 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_off()
2368 intel_dp->want_panel_vdd = false; in edp_panel_off()
2373 wait_panel_off(intel_dp); in edp_panel_off()
2374 intel_dp->panel_power_off_time = ktime_get_boottime(); in edp_panel_off()
2377 intel_display_power_put(dev_priv, intel_dp->aux_power_domain); in edp_panel_off()
2380 void intel_edp_panel_off(struct intel_dp *intel_dp) in intel_edp_panel_off() argument
2382 if (!intel_dp_is_edp(intel_dp)) in intel_edp_panel_off()
2385 pps_lock(intel_dp); in intel_edp_panel_off()
2386 edp_panel_off(intel_dp); in intel_edp_panel_off()
2387 pps_unlock(intel_dp); in intel_edp_panel_off()
2391 static void _intel_edp_backlight_on(struct intel_dp *intel_dp) in _intel_edp_backlight_on() argument
2393 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in _intel_edp_backlight_on()
2403 wait_backlight_on(intel_dp); in _intel_edp_backlight_on()
2405 pps_lock(intel_dp); in _intel_edp_backlight_on()
2407 pp = ironlake_get_pp_control(intel_dp); in _intel_edp_backlight_on()
2410 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in _intel_edp_backlight_on()
2415 pps_unlock(intel_dp); in _intel_edp_backlight_on()
2422 struct intel_dp *intel_dp = enc_to_intel_dp(conn_state->best_encoder); in intel_edp_backlight_on() local
2424 if (!intel_dp_is_edp(intel_dp)) in intel_edp_backlight_on()
2430 _intel_edp_backlight_on(intel_dp); in intel_edp_backlight_on()
2434 static void _intel_edp_backlight_off(struct intel_dp *intel_dp) in _intel_edp_backlight_off() argument
2436 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in _intel_edp_backlight_off()
2440 if (!intel_dp_is_edp(intel_dp)) in _intel_edp_backlight_off()
2443 pps_lock(intel_dp); in _intel_edp_backlight_off()
2445 pp = ironlake_get_pp_control(intel_dp); in _intel_edp_backlight_off()
2448 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in _intel_edp_backlight_off()
2453 pps_unlock(intel_dp); in _intel_edp_backlight_off()
2455 intel_dp->last_backlight_off = jiffies; in _intel_edp_backlight_off()
2456 edp_wait_backlight_off(intel_dp); in _intel_edp_backlight_off()
2462 struct intel_dp *intel_dp = enc_to_intel_dp(old_conn_state->best_encoder); in intel_edp_backlight_off() local
2464 if (!intel_dp_is_edp(intel_dp)) in intel_edp_backlight_off()
2469 _intel_edp_backlight_off(intel_dp); in intel_edp_backlight_off()
2480 struct intel_dp *intel_dp = intel_attached_dp(&connector->base); in intel_edp_backlight_power() local
2483 pps_lock(intel_dp); in intel_edp_backlight_power()
2484 is_enabled = ironlake_get_pp_control(intel_dp) & EDP_BLC_ENABLE; in intel_edp_backlight_power()
2485 pps_unlock(intel_dp); in intel_edp_backlight_power()
2494 _intel_edp_backlight_on(intel_dp); in intel_edp_backlight_power()
2496 _intel_edp_backlight_off(intel_dp); in intel_edp_backlight_power()
2499 static void assert_dp_port(struct intel_dp *intel_dp, bool state) in assert_dp_port() argument
2501 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in assert_dp_port()
2503 bool cur_state = I915_READ(intel_dp->output_reg) & DP_PORT_EN; in assert_dp_port()
2523 static void ironlake_edp_pll_on(struct intel_dp *intel_dp, in ironlake_edp_pll_on() argument
2530 assert_dp_port_disabled(intel_dp); in ironlake_edp_pll_on()
2536 intel_dp->DP &= ~DP_PLL_FREQ_MASK; in ironlake_edp_pll_on()
2539 intel_dp->DP |= DP_PLL_FREQ_162MHZ; in ironlake_edp_pll_on()
2541 intel_dp->DP |= DP_PLL_FREQ_270MHZ; in ironlake_edp_pll_on()
2543 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_on()
2556 intel_dp->DP |= DP_PLL_ENABLE; in ironlake_edp_pll_on()
2558 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_on()
2563 static void ironlake_edp_pll_off(struct intel_dp *intel_dp, in ironlake_edp_pll_off() argument
2570 assert_dp_port_disabled(intel_dp); in ironlake_edp_pll_off()
2575 intel_dp->DP &= ~DP_PLL_ENABLE; in ironlake_edp_pll_off()
2577 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_off()
2582 static bool downstream_hpd_needs_d0(struct intel_dp *intel_dp) in downstream_hpd_needs_d0() argument
2592 return intel_dp->dpcd[DP_DPCD_REV] == 0x11 && in downstream_hpd_needs_d0()
2593 intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT && in downstream_hpd_needs_d0()
2594 intel_dp->downstream_ports[0] & DP_DS_PORT_HPD; in downstream_hpd_needs_d0()
2598 void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) in intel_dp_sink_dpms() argument
2603 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in intel_dp_sink_dpms()
2607 if (downstream_hpd_needs_d0(intel_dp)) in intel_dp_sink_dpms()
2610 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, in intel_dp_sink_dpms()
2613 struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); in intel_dp_sink_dpms()
2620 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, in intel_dp_sink_dpms()
2686 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_get_hw_state() local
2693 ret = intel_dp_port_enabled(dev_priv, intel_dp->output_reg, in intel_dp_get_hw_state()
2705 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_get_config() local
2715 tmp = I915_READ(intel_dp->output_reg); in intel_dp_get_config()
2764 if (intel_dp_is_edp(intel_dp) && dev_priv->vbt.edp.bpp && in intel_dp_get_config()
2789 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_disable_dp() local
2791 intel_dp->link_trained = false; in intel_disable_dp()
2799 intel_edp_panel_vdd_on(intel_dp); in intel_disable_dp()
2801 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); in intel_disable_dp()
2802 intel_edp_panel_off(intel_dp); in intel_disable_dp()
2823 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in g4x_post_disable_dp() local
2836 ironlake_edp_pll_off(intel_dp, old_crtc_state); in g4x_post_disable_dp()
2863 _intel_dp_set_link_train(struct intel_dp *intel_dp, in _intel_dp_set_link_train() argument
2867 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in _intel_dp_set_link_train()
2868 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in _intel_dp_set_link_train()
2870 uint8_t train_pat_mask = drm_dp_training_pattern_mask(intel_dp->dpcd); in _intel_dp_set_link_train()
2946 static void intel_dp_enable_port(struct intel_dp *intel_dp, in intel_dp_enable_port() argument
2949 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_enable_port()
2953 intel_dp_program_link_training_pattern(intel_dp, DP_TRAINING_PATTERN_1); in intel_dp_enable_port()
2961 intel_dp->DP |= DP_PORT_EN; in intel_dp_enable_port()
2963 intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; in intel_dp_enable_port()
2965 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_enable_port()
2966 POSTING_READ(intel_dp->output_reg); in intel_dp_enable_port()
2974 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_enable_dp() local
2976 uint32_t dp_reg = I915_READ(intel_dp->output_reg); in intel_enable_dp()
2982 pps_lock(intel_dp); in intel_enable_dp()
2987 intel_dp_enable_port(intel_dp, pipe_config); in intel_enable_dp()
2989 edp_panel_vdd_on(intel_dp); in intel_enable_dp()
2990 edp_panel_on(intel_dp); in intel_enable_dp()
2991 edp_panel_vdd_off(intel_dp, true); in intel_enable_dp()
2993 pps_unlock(intel_dp); in intel_enable_dp()
3001 vlv_wait_port_ready(dev_priv, dp_to_dig_port(intel_dp), in intel_enable_dp()
3005 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); in intel_enable_dp()
3006 intel_dp_start_link_train(intel_dp); in intel_enable_dp()
3007 intel_dp_stop_link_train(intel_dp); in intel_enable_dp()
3035 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in g4x_pre_enable_dp() local
3042 ironlake_edp_pll_on(intel_dp, pipe_config); in g4x_pre_enable_dp()
3045 static void vlv_detach_power_sequencer(struct intel_dp *intel_dp) in vlv_detach_power_sequencer() argument
3047 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_detach_power_sequencer()
3049 enum pipe pipe = intel_dp->pps_pipe; in vlv_detach_power_sequencer()
3052 WARN_ON(intel_dp->active_pipe != INVALID_PIPE); in vlv_detach_power_sequencer()
3057 edp_panel_vdd_off_sync(intel_dp); in vlv_detach_power_sequencer()
3073 intel_dp->pps_pipe = INVALID_PIPE; in vlv_detach_power_sequencer()
3084 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in vlv_steal_power_sequencer() local
3087 WARN(intel_dp->active_pipe == pipe, in vlv_steal_power_sequencer()
3091 if (intel_dp->pps_pipe != pipe) in vlv_steal_power_sequencer()
3098 vlv_detach_power_sequencer(intel_dp); in vlv_steal_power_sequencer()
3106 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in vlv_init_panel_power_sequencer() local
3111 WARN_ON(intel_dp->active_pipe != INVALID_PIPE); in vlv_init_panel_power_sequencer()
3113 if (intel_dp->pps_pipe != INVALID_PIPE && in vlv_init_panel_power_sequencer()
3114 intel_dp->pps_pipe != crtc->pipe) { in vlv_init_panel_power_sequencer()
3120 vlv_detach_power_sequencer(intel_dp); in vlv_init_panel_power_sequencer()
3129 intel_dp->active_pipe = crtc->pipe; in vlv_init_panel_power_sequencer()
3131 if (!intel_dp_is_edp(intel_dp)) in vlv_init_panel_power_sequencer()
3135 intel_dp->pps_pipe = crtc->pipe; in vlv_init_panel_power_sequencer()
3138 pipe_name(intel_dp->pps_pipe), port_name(encoder->port)); in vlv_init_panel_power_sequencer()
3141 intel_dp_init_panel_power_sequencer(intel_dp); in vlv_init_panel_power_sequencer()
3142 intel_dp_init_panel_power_sequencer_registers(intel_dp, true); in vlv_init_panel_power_sequencer()
3196 intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]) in intel_dp_get_link_status() argument
3198 return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status, in intel_dp_get_link_status()
3204 intel_dp_voltage_max(struct intel_dp *intel_dp) in intel_dp_voltage_max() argument
3206 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_voltage_max()
3207 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_voltage_max()
3223 intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing) in intel_dp_pre_emphasis_max() argument
3225 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_pre_emphasis_max()
3226 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_pre_emphasis_max()
3268 static uint32_t vlv_signal_levels(struct intel_dp *intel_dp) in vlv_signal_levels() argument
3270 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in vlv_signal_levels()
3273 uint8_t train_set = intel_dp->train_set[0]; in vlv_signal_levels()
3354 static uint32_t chv_signal_levels(struct intel_dp *intel_dp) in chv_signal_levels() argument
3356 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in chv_signal_levels()
3359 uint8_t train_set = intel_dp->train_set[0]; in chv_signal_levels()
3535 intel_dp_set_signal_levels(struct intel_dp *intel_dp) in intel_dp_set_signal_levels() argument
3537 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_set_signal_levels()
3538 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_signal_levels()
3541 uint8_t train_set = intel_dp->train_set[0]; in intel_dp_set_signal_levels()
3544 signal_levels = bxt_signal_levels(intel_dp); in intel_dp_set_signal_levels()
3546 signal_levels = ddi_signal_levels(intel_dp); in intel_dp_set_signal_levels()
3549 signal_levels = chv_signal_levels(intel_dp); in intel_dp_set_signal_levels()
3551 signal_levels = vlv_signal_levels(intel_dp); in intel_dp_set_signal_levels()
3572 intel_dp->DP = (intel_dp->DP & ~mask) | signal_levels; in intel_dp_set_signal_levels()
3574 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_set_signal_levels()
3575 POSTING_READ(intel_dp->output_reg); in intel_dp_set_signal_levels()
3579 intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, in intel_dp_program_link_training_pattern() argument
3582 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_program_link_training_pattern()
3586 _intel_dp_set_link_train(intel_dp, &intel_dp->DP, dp_train_pat); in intel_dp_program_link_training_pattern()
3588 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_program_link_training_pattern()
3589 POSTING_READ(intel_dp->output_reg); in intel_dp_program_link_training_pattern()
3592 void intel_dp_set_idle_link_train(struct intel_dp *intel_dp) in intel_dp_set_idle_link_train() argument
3594 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_set_idle_link_train()
3595 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_idle_link_train()
3629 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_link_down() local
3632 uint32_t DP = intel_dp->DP; in intel_dp_link_down()
3637 if (WARN_ON((I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0)) in intel_dp_link_down()
3650 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3651 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3654 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3655 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3674 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3675 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3678 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3679 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3686 msleep(intel_dp->panel_power_down_delay); in intel_dp_link_down()
3688 intel_dp->DP = DP; in intel_dp_link_down()
3691 pps_lock(intel_dp); in intel_dp_link_down()
3692 intel_dp->active_pipe = INVALID_PIPE; in intel_dp_link_down()
3693 pps_unlock(intel_dp); in intel_dp_link_down()
3698 intel_dp_read_dpcd(struct intel_dp *intel_dp) in intel_dp_read_dpcd() argument
3700 if (drm_dp_dpcd_read(&intel_dp->aux, 0x000, intel_dp->dpcd, in intel_dp_read_dpcd()
3701 sizeof(intel_dp->dpcd)) < 0) in intel_dp_read_dpcd()
3704 DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd), intel_dp->dpcd); in intel_dp_read_dpcd()
3706 return intel_dp->dpcd[DP_DPCD_REV] != 0; in intel_dp_read_dpcd()
3710 intel_edp_init_dpcd(struct intel_dp *intel_dp) in intel_edp_init_dpcd() argument
3713 to_i915(dp_to_dig_port(intel_dp)->base.base.dev); in intel_edp_init_dpcd()
3716 WARN_ON(intel_dp->dpcd[DP_DPCD_REV] != 0); in intel_edp_init_dpcd()
3718 if (!intel_dp_read_dpcd(intel_dp)) in intel_edp_init_dpcd()
3721 drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc, in intel_edp_init_dpcd()
3722 drm_dp_is_branch(intel_dp->dpcd)); in intel_edp_init_dpcd()
3724 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) in intel_edp_init_dpcd()
3725 dev_priv->no_aux_handshake = intel_dp->dpcd[DP_MAX_DOWNSPREAD] & in intel_edp_init_dpcd()
3737 if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV, in intel_edp_init_dpcd()
3738 intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) == in intel_edp_init_dpcd()
3739 sizeof(intel_dp->edp_dpcd)) in intel_edp_init_dpcd()
3740 DRM_DEBUG_KMS("eDP DPCD: %*ph\n", (int) sizeof(intel_dp->edp_dpcd), in intel_edp_init_dpcd()
3741 intel_dp->edp_dpcd); in intel_edp_init_dpcd()
3747 intel_psr_init_dpcd(intel_dp); in intel_edp_init_dpcd()
3750 if (intel_dp->edp_dpcd[0] >= DP_EDP_14) { in intel_edp_init_dpcd()
3754 drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES, in intel_edp_init_dpcd()
3769 intel_dp->sink_rates[i] = (val * 200) / 10; in intel_edp_init_dpcd()
3771 intel_dp->num_sink_rates = i; in intel_edp_init_dpcd()
3778 if (intel_dp->num_sink_rates) in intel_edp_init_dpcd()
3779 intel_dp->use_rate_select = true; in intel_edp_init_dpcd()
3781 intel_dp_set_sink_rates(intel_dp); in intel_edp_init_dpcd()
3783 intel_dp_set_common_rates(intel_dp); in intel_edp_init_dpcd()
3790 intel_dp_get_dpcd(struct intel_dp *intel_dp) in intel_dp_get_dpcd() argument
3794 if (!intel_dp_read_dpcd(intel_dp)) in intel_dp_get_dpcd()
3798 if (!intel_dp_is_edp(intel_dp)) { in intel_dp_get_dpcd()
3799 intel_dp_set_sink_rates(intel_dp); in intel_dp_get_dpcd()
3800 intel_dp_set_common_rates(intel_dp); in intel_dp_get_dpcd()
3803 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_COUNT, &sink_count) <= 0) in intel_dp_get_dpcd()
3811 intel_dp->sink_count = DP_GET_SINK_COUNT(sink_count); in intel_dp_get_dpcd()
3820 if (!intel_dp_is_edp(intel_dp) && !intel_dp->sink_count) in intel_dp_get_dpcd()
3823 if (!drm_dp_is_branch(intel_dp->dpcd)) in intel_dp_get_dpcd()
3826 if (intel_dp->dpcd[DP_DPCD_REV] == 0x10) in intel_dp_get_dpcd()
3829 if (drm_dp_dpcd_read(&intel_dp->aux, DP_DOWNSTREAM_PORT_0, in intel_dp_get_dpcd()
3830 intel_dp->downstream_ports, in intel_dp_get_dpcd()
3838 intel_dp_can_mst(struct intel_dp *intel_dp) in intel_dp_can_mst() argument
3845 if (!intel_dp->can_mst) in intel_dp_can_mst()
3848 if (intel_dp->dpcd[DP_DPCD_REV] < 0x12) in intel_dp_can_mst()
3851 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_MSTM_CAP, &mstm_cap) != 1) in intel_dp_can_mst()
3858 intel_dp_configure_mst(struct intel_dp *intel_dp) in intel_dp_configure_mst() argument
3863 if (!intel_dp->can_mst) in intel_dp_configure_mst()
3866 intel_dp->is_mst = intel_dp_can_mst(intel_dp); in intel_dp_configure_mst()
3868 if (intel_dp->is_mst) in intel_dp_configure_mst()
3873 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, in intel_dp_configure_mst()
3874 intel_dp->is_mst); in intel_dp_configure_mst()
3878 intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector) in intel_dp_get_sink_irq() argument
3880 return drm_dp_dpcd_readb(&intel_dp->aux, DP_DEVICE_SERVICE_IRQ_VECTOR, in intel_dp_get_sink_irq()
3885 intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *sink_irq_vector) in intel_dp_get_sink_irq_esi() argument
3887 return drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI, in intel_dp_get_sink_irq_esi()
3892 static uint8_t intel_dp_autotest_link_training(struct intel_dp *intel_dp) in intel_dp_autotest_link_training() argument
3901 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LANE_COUNT, in intel_dp_autotest_link_training()
3910 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LINK_RATE, in intel_dp_autotest_link_training()
3919 if (!intel_dp_link_params_valid(intel_dp, test_link_rate, in intel_dp_autotest_link_training()
3923 intel_dp->compliance.test_lane_count = test_lane_count; in intel_dp_autotest_link_training()
3924 intel_dp->compliance.test_link_rate = test_link_rate; in intel_dp_autotest_link_training()
3929 static uint8_t intel_dp_autotest_video_pattern(struct intel_dp *intel_dp) in intel_dp_autotest_video_pattern() argument
3937 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_PATTERN, in intel_dp_autotest_video_pattern()
3946 status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_H_WIDTH_HI, in intel_dp_autotest_video_pattern()
3953 status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_V_HEIGHT_HI, in intel_dp_autotest_video_pattern()
3960 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_MISC0, in intel_dp_autotest_video_pattern()
3972 intel_dp->compliance.test_data.bpc = 6; in intel_dp_autotest_video_pattern()
3975 intel_dp->compliance.test_data.bpc = 8; in intel_dp_autotest_video_pattern()
3981 intel_dp->compliance.test_data.video_pattern = test_pattern; in intel_dp_autotest_video_pattern()
3982 intel_dp->compliance.test_data.hdisplay = be16_to_cpu(h_width); in intel_dp_autotest_video_pattern()
3983 intel_dp->compliance.test_data.vdisplay = be16_to_cpu(v_height); in intel_dp_autotest_video_pattern()
3985 intel_dp->compliance.test_active = 1; in intel_dp_autotest_video_pattern()
3990 static uint8_t intel_dp_autotest_edid(struct intel_dp *intel_dp) in intel_dp_autotest_edid() argument
3993 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_autotest_edid()
3998 intel_dp->aux.i2c_defer_count > 6) { in intel_dp_autotest_edid()
4006 if (intel_dp->aux.i2c_nack_count > 0 || in intel_dp_autotest_edid()
4007 intel_dp->aux.i2c_defer_count > 0) in intel_dp_autotest_edid()
4009 intel_dp->aux.i2c_nack_count, in intel_dp_autotest_edid()
4010 intel_dp->aux.i2c_defer_count); in intel_dp_autotest_edid()
4011 intel_dp->compliance.test_data.edid = INTEL_DP_RESOLUTION_FAILSAFE; in intel_dp_autotest_edid()
4020 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_EDID_CHECKSUM, in intel_dp_autotest_edid()
4025 intel_dp->compliance.test_data.edid = INTEL_DP_RESOLUTION_PREFERRED; in intel_dp_autotest_edid()
4029 intel_dp->compliance.test_active = 1; in intel_dp_autotest_edid()
4034 static uint8_t intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp) in intel_dp_autotest_phy_pattern() argument
4040 static void intel_dp_handle_test_request(struct intel_dp *intel_dp) in intel_dp_handle_test_request() argument
4046 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_REQUEST, &request); in intel_dp_handle_test_request()
4055 response = intel_dp_autotest_link_training(intel_dp); in intel_dp_handle_test_request()
4059 response = intel_dp_autotest_video_pattern(intel_dp); in intel_dp_handle_test_request()
4063 response = intel_dp_autotest_edid(intel_dp); in intel_dp_handle_test_request()
4067 response = intel_dp_autotest_phy_pattern(intel_dp); in intel_dp_handle_test_request()
4075 intel_dp->compliance.test_type = request; in intel_dp_handle_test_request()
4078 status = drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE, response); in intel_dp_handle_test_request()
4084 intel_dp_check_mst_status(struct intel_dp *intel_dp) in intel_dp_check_mst_status() argument
4088 if (intel_dp->is_mst) { in intel_dp_check_mst_status()
4093 bret = intel_dp_get_sink_irq_esi(intel_dp, esi); in intel_dp_check_mst_status()
4098 if (intel_dp->active_mst_links && in intel_dp_check_mst_status()
4099 !drm_dp_channel_eq_ok(&esi[10], intel_dp->lane_count)) { in intel_dp_check_mst_status()
4101 intel_dp_start_link_train(intel_dp); in intel_dp_check_mst_status()
4102 intel_dp_stop_link_train(intel_dp); in intel_dp_check_mst_status()
4106 ret = drm_dp_mst_hpd_irq(&intel_dp->mst_mgr, esi, &handled); in intel_dp_check_mst_status()
4111 wret = drm_dp_dpcd_write(&intel_dp->aux, in intel_dp_check_mst_status()
4119 bret = intel_dp_get_sink_irq_esi(intel_dp, esi); in intel_dp_check_mst_status()
4129 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_check_mst_status()
4131 intel_dp->is_mst = false; in intel_dp_check_mst_status()
4132 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst); in intel_dp_check_mst_status()
4141 intel_dp_needs_link_retrain(struct intel_dp *intel_dp) in intel_dp_needs_link_retrain() argument
4145 if (!intel_dp->link_trained) in intel_dp_needs_link_retrain()
4148 if (!intel_dp_get_link_status(intel_dp, link_status)) in intel_dp_needs_link_retrain()
4155 if (!intel_dp_link_params_valid(intel_dp, intel_dp->link_rate, in intel_dp_needs_link_retrain()
4156 intel_dp->lane_count)) in intel_dp_needs_link_retrain()
4160 return !drm_dp_channel_eq_ok(link_status, intel_dp->lane_count); in intel_dp_needs_link_retrain()
4167 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_retrain_link() local
4168 struct intel_connector *connector = intel_dp->attached_connector; in intel_dp_retrain_link()
4205 if (!intel_dp_needs_link_retrain(intel_dp)) in intel_dp_retrain_link()
4214 intel_dp_start_link_train(intel_dp); in intel_dp_retrain_link()
4215 intel_dp_stop_link_train(intel_dp); in intel_dp_retrain_link()
4283 intel_dp_short_pulse(struct intel_dp *intel_dp) in intel_dp_short_pulse() argument
4285 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_short_pulse()
4287 u8 old_sink_count = intel_dp->sink_count; in intel_dp_short_pulse()
4294 memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance)); in intel_dp_short_pulse()
4302 ret = intel_dp_get_dpcd(intel_dp); in intel_dp_short_pulse()
4304 if ((old_sink_count != intel_dp->sink_count) || !ret) { in intel_dp_short_pulse()
4310 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in intel_dp_short_pulse()
4311 intel_dp_get_sink_irq(intel_dp, &sink_irq_vector) && in intel_dp_short_pulse()
4314 drm_dp_dpcd_writeb(&intel_dp->aux, in intel_dp_short_pulse()
4319 intel_dp_handle_test_request(intel_dp); in intel_dp_short_pulse()
4325 drm_dp_cec_irq(&intel_dp->aux); in intel_dp_short_pulse()
4328 if (intel_dp_needs_link_retrain(intel_dp)) in intel_dp_short_pulse()
4331 intel_psr_short_pulse(intel_dp); in intel_dp_short_pulse()
4333 if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) { in intel_dp_short_pulse()
4344 intel_dp_detect_dpcd(struct intel_dp *intel_dp) in intel_dp_detect_dpcd() argument
4346 struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); in intel_dp_detect_dpcd()
4347 uint8_t *dpcd = intel_dp->dpcd; in intel_dp_detect_dpcd()
4353 if (!intel_dp_get_dpcd(intel_dp)) in intel_dp_detect_dpcd()
4356 if (intel_dp_is_edp(intel_dp)) in intel_dp_detect_dpcd()
4364 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in intel_dp_detect_dpcd()
4365 intel_dp->downstream_ports[0] & DP_DS_PORT_HPD) { in intel_dp_detect_dpcd()
4367 return intel_dp->sink_count ? in intel_dp_detect_dpcd()
4371 if (intel_dp_can_mst(intel_dp)) in intel_dp_detect_dpcd()
4375 if (drm_probe_ddc(&intel_dp->aux.ddc)) in intel_dp_detect_dpcd()
4379 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in intel_dp_detect_dpcd()
4380 type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK; in intel_dp_detect_dpcd()
4385 type = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & in intel_dp_detect_dpcd()
4398 edp_detect(struct intel_dp *intel_dp) in edp_detect() argument
4609 intel_dp_get_edid(struct intel_dp *intel_dp) in intel_dp_get_edid() argument
4611 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_get_edid()
4622 &intel_dp->aux.ddc); in intel_dp_get_edid()
4626 intel_dp_set_edid(struct intel_dp *intel_dp) in intel_dp_set_edid() argument
4628 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_set_edid()
4631 intel_dp_unset_edid(intel_dp); in intel_dp_set_edid()
4632 edid = intel_dp_get_edid(intel_dp); in intel_dp_set_edid()
4635 intel_dp->has_audio = drm_detect_monitor_audio(edid); in intel_dp_set_edid()
4636 drm_dp_cec_set_edid(&intel_dp->aux, edid); in intel_dp_set_edid()
4640 intel_dp_unset_edid(struct intel_dp *intel_dp) in intel_dp_unset_edid() argument
4642 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_unset_edid()
4644 drm_dp_cec_unset_edid(&intel_dp->aux); in intel_dp_unset_edid()
4648 intel_dp->has_audio = false; in intel_dp_unset_edid()
4656 struct intel_dp *intel_dp = intel_attached_dp(&connector->base); in intel_dp_long_pulse() local
4662 intel_display_power_get(dev_priv, intel_dp->aux_power_domain); in intel_dp_long_pulse()
4665 if (intel_dp_is_edp(intel_dp)) in intel_dp_long_pulse()
4666 status = edp_detect(intel_dp); in intel_dp_long_pulse()
4667 else if (intel_digital_port_connected(&dp_to_dig_port(intel_dp)->base)) in intel_dp_long_pulse()
4668 status = intel_dp_detect_dpcd(intel_dp); in intel_dp_long_pulse()
4673 memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance)); in intel_dp_long_pulse()
4675 if (intel_dp->is_mst) { in intel_dp_long_pulse()
4677 intel_dp->is_mst, in intel_dp_long_pulse()
4678 intel_dp->mst_mgr.mst_state); in intel_dp_long_pulse()
4679 intel_dp->is_mst = false; in intel_dp_long_pulse()
4680 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, in intel_dp_long_pulse()
4681 intel_dp->is_mst); in intel_dp_long_pulse()
4687 if (intel_dp->reset_link_params) { in intel_dp_long_pulse()
4689 intel_dp->max_link_lane_count = intel_dp_max_common_lane_count(intel_dp); in intel_dp_long_pulse()
4692 intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp); in intel_dp_long_pulse()
4694 intel_dp->reset_link_params = false; in intel_dp_long_pulse()
4697 intel_dp_print_rates(intel_dp); in intel_dp_long_pulse()
4699 drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc, in intel_dp_long_pulse()
4700 drm_dp_is_branch(intel_dp->dpcd)); in intel_dp_long_pulse()
4702 intel_dp_configure_mst(intel_dp); in intel_dp_long_pulse()
4704 if (intel_dp->is_mst) { in intel_dp_long_pulse()
4725 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_long_pulse()
4735 intel_dp->aux.i2c_nack_count = 0; in intel_dp_long_pulse()
4736 intel_dp->aux.i2c_defer_count = 0; in intel_dp_long_pulse()
4738 intel_dp_set_edid(intel_dp); in intel_dp_long_pulse()
4739 if (intel_dp_is_edp(intel_dp) || connector->detect_edid) in intel_dp_long_pulse()
4741 intel_dp->detect_done = true; in intel_dp_long_pulse()
4744 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in intel_dp_long_pulse()
4745 intel_dp_get_sink_irq(intel_dp, &sink_irq_vector) && in intel_dp_long_pulse()
4748 drm_dp_dpcd_writeb(&intel_dp->aux, in intel_dp_long_pulse()
4753 intel_dp_handle_test_request(intel_dp); in intel_dp_long_pulse()
4759 if (status != connector_status_connected && !intel_dp->is_mst) in intel_dp_long_pulse()
4760 intel_dp_unset_edid(intel_dp); in intel_dp_long_pulse()
4762 intel_display_power_put(dev_priv, intel_dp->aux_power_domain); in intel_dp_long_pulse()
4771 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_detect() local
4778 if (!intel_dp->detect_done) { in intel_dp_detect()
4789 status = intel_dp_long_pulse(intel_dp->attached_connector, ctx); in intel_dp_detect()
4792 intel_dp->detect_done = false; in intel_dp_detect()
4800 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_force() local
4801 struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_force()
4806 intel_dp_unset_edid(intel_dp); in intel_dp_force()
4811 intel_display_power_get(dev_priv, intel_dp->aux_power_domain); in intel_dp_force()
4813 intel_dp_set_edid(intel_dp); in intel_dp_force()
4815 intel_display_power_put(dev_priv, intel_dp->aux_power_domain); in intel_dp_force()
4849 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_connector_register() local
4860 intel_dp->aux.name, connector->kdev->kobj.name); in intel_dp_connector_register()
4862 intel_dp->aux.dev = connector->kdev; in intel_dp_connector_register()
4863 ret = drm_dp_aux_register(&intel_dp->aux); in intel_dp_connector_register()
4865 drm_dp_cec_register_connector(&intel_dp->aux, in intel_dp_connector_register()
4873 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_connector_unregister() local
4875 drm_dp_cec_unregister_connector(&intel_dp->aux); in intel_dp_connector_unregister()
4876 drm_dp_aux_unregister(&intel_dp->aux); in intel_dp_connector_unregister()
4904 struct intel_dp *intel_dp = &intel_dig_port->dp; in intel_dp_encoder_destroy() local
4907 if (intel_dp_is_edp(intel_dp)) { in intel_dp_encoder_destroy()
4908 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); in intel_dp_encoder_destroy()
4913 pps_lock(intel_dp); in intel_dp_encoder_destroy()
4914 edp_panel_vdd_off_sync(intel_dp); in intel_dp_encoder_destroy()
4915 pps_unlock(intel_dp); in intel_dp_encoder_destroy()
4917 if (intel_dp->edp_notifier.notifier_call) { in intel_dp_encoder_destroy()
4918 unregister_reboot_notifier(&intel_dp->edp_notifier); in intel_dp_encoder_destroy()
4919 intel_dp->edp_notifier.notifier_call = NULL; in intel_dp_encoder_destroy()
4923 intel_dp_aux_fini(intel_dp); in intel_dp_encoder_destroy()
4931 struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); in intel_dp_encoder_suspend() local
4933 if (!intel_dp_is_edp(intel_dp)) in intel_dp_encoder_suspend()
4940 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); in intel_dp_encoder_suspend()
4941 pps_lock(intel_dp); in intel_dp_encoder_suspend()
4942 edp_panel_vdd_off_sync(intel_dp); in intel_dp_encoder_suspend()
4943 pps_unlock(intel_dp); in intel_dp_encoder_suspend()
4950 struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base); in intel_dp_hdcp_write_an_aksv() local
4976 ret = intel_dp_aux_xfer(intel_dp, txbuf, HEADER_SIZE + msg.size, in intel_dp_hdcp_write_an_aksv()
5178 static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp) in intel_edp_panel_vdd_sanitize() argument
5180 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_edp_panel_vdd_sanitize()
5184 if (!edp_have_panel_vdd(intel_dp)) in intel_edp_panel_vdd_sanitize()
5194 intel_display_power_get(dev_priv, intel_dp->aux_power_domain); in intel_edp_panel_vdd_sanitize()
5196 edp_panel_vdd_schedule_off(intel_dp); in intel_edp_panel_vdd_sanitize()
5199 static enum pipe vlv_active_pipe(struct intel_dp *intel_dp) in vlv_active_pipe() argument
5201 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in vlv_active_pipe()
5202 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in vlv_active_pipe()
5205 if (intel_dp_port_enabled(dev_priv, intel_dp->output_reg, in vlv_active_pipe()
5215 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_dp_encoder_reset() local
5216 struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); in intel_dp_encoder_reset()
5219 intel_dp->DP = I915_READ(intel_dp->output_reg); in intel_dp_encoder_reset()
5224 intel_dp->reset_link_params = true; in intel_dp_encoder_reset()
5226 pps_lock(intel_dp); in intel_dp_encoder_reset()
5229 intel_dp->active_pipe = vlv_active_pipe(intel_dp); in intel_dp_encoder_reset()
5231 if (intel_dp_is_edp(intel_dp)) { in intel_dp_encoder_reset()
5233 intel_dp_pps_init(intel_dp); in intel_dp_encoder_reset()
5234 intel_edp_panel_vdd_sanitize(intel_dp); in intel_dp_encoder_reset()
5237 pps_unlock(intel_dp); in intel_dp_encoder_reset()
5267 struct intel_dp *intel_dp = &intel_dig_port->dp; in intel_dp_hpd_pulse() local
5268 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_hpd_pulse()
5288 intel_dp->reset_link_params = true; in intel_dp_hpd_pulse()
5289 intel_dp->detect_done = false; in intel_dp_hpd_pulse()
5293 intel_display_power_get(dev_priv, intel_dp->aux_power_domain); in intel_dp_hpd_pulse()
5295 if (intel_dp->is_mst) { in intel_dp_hpd_pulse()
5296 if (intel_dp_check_mst_status(intel_dp) == -EINVAL) { in intel_dp_hpd_pulse()
5302 intel_dp->is_mst, intel_dp->mst_mgr.mst_state); in intel_dp_hpd_pulse()
5303 intel_dp->is_mst = false; in intel_dp_hpd_pulse()
5304 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, in intel_dp_hpd_pulse()
5305 intel_dp->is_mst); in intel_dp_hpd_pulse()
5306 intel_dp->detect_done = false; in intel_dp_hpd_pulse()
5311 if (!intel_dp->is_mst) { in intel_dp_hpd_pulse()
5314 handled = intel_dp_short_pulse(intel_dp); in intel_dp_hpd_pulse()
5317 intel_hdcp_check_link(intel_dp->attached_connector); in intel_dp_hpd_pulse()
5320 intel_dp->detect_done = false; in intel_dp_hpd_pulse()
5328 intel_display_power_put(dev_priv, intel_dp->aux_power_domain); in intel_dp_hpd_pulse()
5350 intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector) in intel_dp_add_properties() argument
5353 enum port port = dp_to_dig_port(intel_dp)->base.port; in intel_dp_add_properties()
5360 if (intel_dp_is_edp(intel_dp)) { in intel_dp_add_properties()
5374 static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp) in intel_dp_init_panel_power_timestamps() argument
5376 intel_dp->panel_power_off_time = ktime_get_boottime(); in intel_dp_init_panel_power_timestamps()
5377 intel_dp->last_power_on = jiffies; in intel_dp_init_panel_power_timestamps()
5378 intel_dp->last_backlight_off = jiffies; in intel_dp_init_panel_power_timestamps()
5382 intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct edp_power_seq *seq) in intel_pps_readout_hw_state() argument
5384 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_pps_readout_hw_state()
5388 intel_pps_get_registers(intel_dp, ®s); in intel_pps_readout_hw_state()
5392 pp_ctl = ironlake_get_pp_control(intel_dp); in intel_pps_readout_hw_state()
5434 intel_pps_verify_state(struct intel_dp *intel_dp) in intel_pps_verify_state() argument
5437 struct edp_power_seq *sw = &intel_dp->pps_delays; in intel_pps_verify_state()
5439 intel_pps_readout_hw_state(intel_dp, &hw); in intel_pps_verify_state()
5450 intel_dp_init_panel_power_sequencer(struct intel_dp *intel_dp) in intel_dp_init_panel_power_sequencer() argument
5452 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_init_panel_power_sequencer()
5454 *final = &intel_dp->pps_delays; in intel_dp_init_panel_power_sequencer()
5462 intel_pps_readout_hw_state(intel_dp, &cur); in intel_dp_init_panel_power_sequencer()
5510 intel_dp->panel_power_up_delay = get_delay(t1_t3); in intel_dp_init_panel_power_sequencer()
5511 intel_dp->backlight_on_delay = get_delay(t8); in intel_dp_init_panel_power_sequencer()
5512 intel_dp->backlight_off_delay = get_delay(t9); in intel_dp_init_panel_power_sequencer()
5513 intel_dp->panel_power_down_delay = get_delay(t10); in intel_dp_init_panel_power_sequencer()
5514 intel_dp->panel_power_cycle_delay = get_delay(t11_t12); in intel_dp_init_panel_power_sequencer()
5518 intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, in intel_dp_init_panel_power_sequencer()
5519 intel_dp->panel_power_cycle_delay); in intel_dp_init_panel_power_sequencer()
5522 intel_dp->backlight_on_delay, intel_dp->backlight_off_delay); in intel_dp_init_panel_power_sequencer()
5542 intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, in intel_dp_init_panel_power_sequencer_registers() argument
5545 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_init_panel_power_sequencer_registers()
5549 enum port port = dp_to_dig_port(intel_dp)->base.port; in intel_dp_init_panel_power_sequencer_registers()
5550 const struct edp_power_seq *seq = &intel_dp->pps_delays; in intel_dp_init_panel_power_sequencer_registers()
5554 intel_pps_get_registers(intel_dp, ®s); in intel_dp_init_panel_power_sequencer_registers()
5569 u32 pp = ironlake_get_pp_control(intel_dp); in intel_dp_init_panel_power_sequencer_registers()
5639 static void intel_dp_pps_init(struct intel_dp *intel_dp) in intel_dp_pps_init() argument
5641 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_dp_pps_init()
5644 vlv_initial_power_sequencer_setup(intel_dp); in intel_dp_pps_init()
5646 intel_dp_init_panel_power_sequencer(intel_dp); in intel_dp_pps_init()
5647 intel_dp_init_panel_power_sequencer_registers(intel_dp, false); in intel_dp_pps_init()
5670 struct intel_dp *intel_dp = dev_priv->drrs.dp; in intel_dp_set_drrs_state() local
5679 if (intel_dp == NULL) { in intel_dp_set_drrs_state()
5684 dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_drrs_state()
5697 if (intel_dp->attached_connector->panel.downclock_mode->vrefresh == in intel_dp_set_drrs_state()
5755 void intel_edp_drrs_enable(struct intel_dp *intel_dp, in intel_edp_drrs_enable() argument
5758 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_edp_drrs_enable()
5778 dev_priv->drrs.dp = intel_dp; in intel_edp_drrs_enable()
5790 void intel_edp_drrs_disable(struct intel_dp *intel_dp, in intel_edp_drrs_disable() argument
5793 struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); in intel_edp_drrs_disable()
5806 intel_dp->attached_connector->panel.fixed_mode->vrefresh); in intel_edp_drrs_disable()
5818 struct intel_dp *intel_dp; in intel_edp_drrs_downclock_work() local
5822 intel_dp = dev_priv->drrs.dp; in intel_edp_drrs_downclock_work()
5824 if (!intel_dp) in intel_edp_drrs_downclock_work()
5836 struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc; in intel_edp_drrs_downclock_work()
5839 intel_dp->attached_connector->panel.downclock_mode->vrefresh); in intel_edp_drrs_downclock_work()
6022 static bool intel_edp_init_connector(struct intel_dp *intel_dp, in intel_edp_init_connector() argument
6025 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_edp_init_connector()
6035 if (!intel_dp_is_edp(intel_dp)) in intel_edp_init_connector()
6051 pps_lock(intel_dp); in intel_edp_init_connector()
6053 intel_dp_init_panel_power_timestamps(intel_dp); in intel_edp_init_connector()
6054 intel_dp_pps_init(intel_dp); in intel_edp_init_connector()
6055 intel_edp_panel_vdd_sanitize(intel_dp); in intel_edp_init_connector()
6057 pps_unlock(intel_dp); in intel_edp_init_connector()
6060 has_dpcd = intel_edp_init_dpcd(intel_dp); in intel_edp_init_connector()
6069 edid = drm_get_edid(connector, &intel_dp->aux.ddc); in intel_edp_init_connector()
6106 intel_dp->edp_notifier.notifier_call = edp_notify_handler; in intel_edp_init_connector()
6107 register_reboot_notifier(&intel_dp->edp_notifier); in intel_edp_init_connector()
6114 pipe = vlv_active_pipe(intel_dp); in intel_edp_init_connector()
6117 pipe = intel_dp->pps_pipe; in intel_edp_init_connector()
6133 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); in intel_edp_init_connector()
6138 pps_lock(intel_dp); in intel_edp_init_connector()
6139 edp_panel_vdd_off_sync(intel_dp); in intel_edp_init_connector()
6140 pps_unlock(intel_dp); in intel_edp_init_connector()
6173 struct intel_dp *intel_dp = &intel_dig_port->dp; in intel_dp_init_connector() local
6189 intel_dp_set_source_rates(intel_dp); in intel_dp_init_connector()
6191 intel_dp->reset_link_params = true; in intel_dp_init_connector()
6192 intel_dp->pps_pipe = INVALID_PIPE; in intel_dp_init_connector()
6193 intel_dp->active_pipe = INVALID_PIPE; in intel_dp_init_connector()
6197 intel_dp->prepare_link_retrain = intel_ddi_prepare_link_retrain; in intel_dp_init_connector()
6200 intel_dp->DP = I915_READ(intel_dp->output_reg); in intel_dp_init_connector()
6201 intel_dp->attached_connector = intel_connector; in intel_dp_init_connector()
6209 intel_dp->active_pipe = vlv_active_pipe(intel_dp); in intel_dp_init_connector()
6221 intel_dp_is_edp(intel_dp) && in intel_dp_init_connector()
6238 intel_dp_aux_init(intel_dp); in intel_dp_init_connector()
6240 INIT_DELAYED_WORK(&intel_dp->panel_vdd_work, in intel_dp_init_connector()
6251 if (HAS_DP_MST(dev_priv) && !intel_dp_is_edp(intel_dp) && in intel_dp_init_connector()
6257 if (!intel_edp_init_connector(intel_dp, intel_connector)) { in intel_dp_init_connector()
6258 intel_dp_aux_fini(intel_dp); in intel_dp_init_connector()
6263 intel_dp_add_properties(intel_dp, connector); in intel_dp_init_connector()
6265 if (is_hdcp_supported(dev_priv, port) && !intel_dp_is_edp(intel_dp)) { in intel_dp_init_connector()
6378 struct intel_dp *intel_dp; in intel_dp_mst_suspend() local
6383 intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_mst_suspend()
6385 if (!intel_dp->can_mst) in intel_dp_mst_suspend()
6388 if (intel_dp->is_mst) in intel_dp_mst_suspend()
6389 drm_dp_mst_topology_mgr_suspend(&intel_dp->mst_mgr); in intel_dp_mst_suspend()
6398 struct intel_dp *intel_dp; in intel_dp_mst_resume() local
6404 intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_mst_resume()
6406 if (!intel_dp->can_mst) in intel_dp_mst_resume()
6409 ret = drm_dp_mst_topology_mgr_resume(&intel_dp->mst_mgr); in intel_dp_mst_resume()
6411 intel_dp_check_mst_status(intel_dp); in intel_dp_mst_resume()