537 	DRM_DEBUG_KMS("kicking pipe %c power sequencer for port %c\n",  in vlv_power_sequencer_kick()
656 	DRM_DEBUG_KMS("picked pipe %c power sequencer for port %c\n",  in vlv_power_sequencer_pipe()
766 		DRM_DEBUG_KMS("no initial power sequencer for port %c\n",  in vlv_initial_power_sequencer_setup()
771 	DRM_DEBUG_KMS("initial power sequencer for port %c: pipe %c\n",  in vlv_initial_power_sequencer_setup()
932 		DRM_DEBUG_KMS("Status 0x%08x Control 0x%08x\n",  in intel_dp_check_edp()
1188 		DRM_DEBUG_KMS("dp_aux_ch timeout status 0x%08x\n", status);  in intel_dp_aux_xfer()
1203 		DRM_DEBUG_KMS("Forbidden recv_bytes = %d on aux transaction\n",  in intel_dp_aux_xfer()
1324 		DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n",  in intel_aux_ch()
1354 	DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n",  in intel_aux_ch()
1608 	DRM_DEBUG_KMS("source rates: %s\n", str);  in intel_dp_print_rates()
1612 	DRM_DEBUG_KMS("sink rates: %s\n", str);  in intel_dp_print_rates()
1616 	DRM_DEBUG_KMS("common rates: %s\n", str);  in intel_dp_print_rates()
1679 			DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n",  in intel_dp_compute_bpp()
1701 		DRM_DEBUG_KMS("Setting pipe_bpp to %d\n", bpp);  in intel_dp_adjust_compliance_config()
1798 	DRM_DEBUG_KMS("DP link computation with max lane count %i "  in intel_dp_compute_link_config()
1811 	DRM_DEBUG_KMS("DP lane count %d clock %d bpp %d\n",  in intel_dp_compute_link_config()
1815 	DRM_DEBUG_KMS("DP link rate required %i available %i\n",  in intel_dp_compute_link_config()
2043 	DRM_DEBUG_KMS("mask %08x value %08x status %08x control %08x\n",  in wait_panel_status()
2055 	DRM_DEBUG_KMS("Wait complete\n");  in wait_panel_status()
2060 	DRM_DEBUG_KMS("Wait for panel power on\n");  in wait_panel_on()
2066 	DRM_DEBUG_KMS("Wait for panel power off time\n");  in wait_panel_off()
2075 	DRM_DEBUG_KMS("Wait for panel power cycle\n");  in wait_panel_power_cycle()
2149 	DRM_DEBUG_KMS("Turning eDP port %c VDD on\n",  in edp_panel_vdd_on()
2163 	DRM_DEBUG_KMS("PP_STATUS: 0x%08x PP_CONTROL: 0x%08x\n",  in edp_panel_vdd_on()
2169 		DRM_DEBUG_KMS("eDP port %c panel power wasn't enabled\n",  in edp_panel_vdd_on()
2214 	DRM_DEBUG_KMS("Turning eDP port %c VDD off\n",  in edp_panel_vdd_off_sync()
2227 	DRM_DEBUG_KMS("PP_STATUS: 0x%08x PP_CONTROL: 0x%08x\n",  in edp_panel_vdd_off_sync()
2296 	DRM_DEBUG_KMS("Turn eDP port %c panel power on\n",  in edp_panel_on()
2354 	DRM_DEBUG_KMS("Turn eDP port %c panel power off\n",  in edp_panel_off()
2427 	DRM_DEBUG_KMS("\n");  in intel_edp_backlight_on()
2467 	DRM_DEBUG_KMS("\n");  in intel_edp_backlight_off()
2490 	DRM_DEBUG_KMS("panel power control backlight %s\n",  in intel_edp_backlight_power()
2533 	DRM_DEBUG_KMS("enabling eDP PLL for clock %d\n",  in ironlake_edp_pll_on()
2573 	DRM_DEBUG_KMS("disabling eDP PLL\n");  in ironlake_edp_pll_off()
2632 		DRM_DEBUG_KMS("failed to %s sink power state\n",  in intel_dp_sink_dpms()
2650 	DRM_DEBUG_KMS("No pipe for DP port %c found\n", port_name(port));  in cpt_dp_port_selected()
2779 		DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n",  in intel_dp_get_config()
2873 		DRM_DEBUG_KMS("Using DP training pattern TPS%d\n",  in _intel_dp_set_link_train()
2920 			DRM_DEBUG_KMS("TPS3 not supported, using TPS2 instead\n");  in _intel_dp_set_link_train()
2939 			DRM_DEBUG_KMS("TPS3 not supported, using TPS2 instead\n");  in _intel_dp_set_link_train()
3068 	DRM_DEBUG_KMS("detaching pipe %c power sequencer from port %c\n",  in vlv_detach_power_sequencer()
3094 		DRM_DEBUG_KMS("stealing pipe %c power sequencer from port %c\n",  in vlv_steal_power_sequencer()
3137 	DRM_DEBUG_KMS("initializing pipe %c power sequencer for port %c\n",  in vlv_init_panel_power_sequencer()
3497 		DRM_DEBUG_KMS("Unsupported voltage swing/pre-emphasis level:"  in snb_cpu_edp_signal_levels()
3528 		DRM_DEBUG_KMS("Unsupported voltage swing/pre-emphasis level:"  in ivb_cpu_edp_signal_levels()
3564 		DRM_DEBUG_KMS("Using signal levels %08x\n", signal_levels);  in intel_dp_set_signal_levels()
3566 	DRM_DEBUG_KMS("Using vswing level %d\n",  in intel_dp_set_signal_levels()
3568 	DRM_DEBUG_KMS("Using pre-emphasis level %d\n",  in intel_dp_set_signal_levels()
3640 	DRM_DEBUG_KMS("\n");  in intel_dp_link_down()
3704 	DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd), intel_dp->dpcd);  in intel_dp_read_dpcd()
3740 		DRM_DEBUG_KMS("eDP DPCD: %*ph\n", (int) sizeof(intel_dp->edp_dpcd),  in intel_edp_init_dpcd()
3869 		DRM_DEBUG_KMS("Sink is MST capable\n");  in intel_dp_configure_mst()
3871 		DRM_DEBUG_KMS("Sink is not MST capable\n");  in intel_dp_configure_mst()
3905 		DRM_DEBUG_KMS("Lane count read failed\n");  in intel_dp_autotest_link_training()
3913 		DRM_DEBUG_KMS("Link Rate read failed\n");  in intel_dp_autotest_link_training()
3940 		DRM_DEBUG_KMS("Test pattern read failed\n");  in intel_dp_autotest_video_pattern()
3949 		DRM_DEBUG_KMS("H Width read failed\n");  in intel_dp_autotest_video_pattern()
3956 		DRM_DEBUG_KMS("V Height read failed\n");  in intel_dp_autotest_video_pattern()
3963 		DRM_DEBUG_KMS("TEST MISC read failed\n");  in intel_dp_autotest_video_pattern()
4008 			DRM_DEBUG_KMS("EDID read had %d NACKs, %d DEFERs\n",  in intel_dp_autotest_edid()
4022 			DRM_DEBUG_KMS("Failed to write EDID checksum\n");  in intel_dp_autotest_edid()
4048 		DRM_DEBUG_KMS("Could not read test request from sink\n");  in intel_dp_handle_test_request()
4054 		DRM_DEBUG_KMS("LINK_TRAINING test requested\n");  in intel_dp_handle_test_request()
4058 		DRM_DEBUG_KMS("TEST_PATTERN test requested\n");  in intel_dp_handle_test_request()
4062 		DRM_DEBUG_KMS("EDID test requested\n");  in intel_dp_handle_test_request()
4066 		DRM_DEBUG_KMS("PHY_PATTERN test requested\n");  in intel_dp_handle_test_request()
4070 		DRM_DEBUG_KMS("Invalid test request '%02x'\n", request);  in intel_dp_handle_test_request()
4080 		DRM_DEBUG_KMS("Could not write test response to sink\n");  in intel_dp_handle_test_request()
4100 				DRM_DEBUG_KMS("channel EQ not ok, retraining\n");  in intel_dp_check_mst_status()
4105 			DRM_DEBUG_KMS("got esi %3ph\n", esi);  in intel_dp_check_mst_status()
4121 					DRM_DEBUG_KMS("got esi2 %3ph\n", esi);  in intel_dp_check_mst_status()
4130 			DRM_DEBUG_KMS("failed to get ESI - device may have failed\n");  in intel_dp_check_mst_status()
4334 		DRM_DEBUG_KMS("Link Training Compliance Test requested\n");  in intel_dp_short_pulse()
4393 	DRM_DEBUG_KMS("Broken DP branch device, ignoring\n");  in intel_dp_detect_dpcd()
4676 			DRM_DEBUG_KMS("MST device may have disappeared %d vs %d\n",  in intel_dp_long_pulse()
4774 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",  in intel_dp_detect()
4804 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",  in intel_dp_force()
4859 	DRM_DEBUG_KMS("registering %s bus for %s\n",  in intel_dp_connector_register()
5193 	DRM_DEBUG_KMS("VDD left on by BIOS, adjusting state tracking\n");  in intel_edp_panel_vdd_sanitize()
5278 		DRM_DEBUG_KMS("ignoring long hpd on eDP port %c\n",  in intel_dp_hpd_pulse()
5283 	DRM_DEBUG_KMS("got hpd irq on port %c - %s\n",  in intel_dp_hpd_pulse()
5301 			DRM_DEBUG_KMS("MST device may have disappeared %d vs %d\n",  in intel_dp_hpd_pulse()
5428 	DRM_DEBUG_KMS("%s t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n",  in intel_pps_dump_state()
5474 		DRM_DEBUG_KMS("Increasing T12 panel delay as per the quirk to %d\n",  in intel_dp_init_panel_power_sequencer()
5517 	DRM_DEBUG_KMS("panel power up delay %d, power down delay %d, power cycle delay %d\n",  in intel_dp_init_panel_power_sequencer()
5521 	DRM_DEBUG_KMS("backlight on delay %d, off delay %d\n",  in intel_dp_init_panel_power_sequencer()
5574 			DRM_DEBUG_KMS("VDD already on, disabling first\n");  in intel_dp_init_panel_power_sequencer_registers()
5630 	DRM_DEBUG_KMS("panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x\n",  in intel_dp_init_panel_power_sequencer_registers()
5675 		DRM_DEBUG_KMS("Refresh rate should be positive non-zero.\n");  in intel_dp_set_drrs_state()
5680 		DRM_DEBUG_KMS("DRRS not supported.\n");  in intel_dp_set_drrs_state()
5688 		DRM_DEBUG_KMS("DRRS: intel_crtc not initialized\n");  in intel_dp_set_drrs_state()
5693 		DRM_DEBUG_KMS("Only Seamless DRRS supported.\n");  in intel_dp_set_drrs_state()
5702 		DRM_DEBUG_KMS(  in intel_dp_set_drrs_state()
5708 		DRM_DEBUG_KMS("eDP encoder disabled. CRTC not Active\n");  in intel_dp_set_drrs_state()
5745 	DRM_DEBUG_KMS("eDP Refresh Rate set to : %dHz\n", refresh_rate);  in intel_dp_set_drrs_state()
5761 		DRM_DEBUG_KMS("Panel doesn't support DRRS\n");  in intel_edp_drrs_enable()
5766 		DRM_DEBUG_KMS("PSR enabled. Not enabling DRRS.\n");  in intel_edp_drrs_enable()
5998 		DRM_DEBUG_KMS("DRRS supported for Gen7 and above\n");  in intel_dp_drrs_init()
6003 		DRM_DEBUG_KMS("VBT doesn't support DRRS\n");  in intel_dp_drrs_init()
6011 		DRM_DEBUG_KMS("Downclock mode is not found. DRRS not supported\n");  in intel_dp_drrs_init()
6018 	DRM_DEBUG_KMS("seamless DRRS supported for eDP panel.\n");  in intel_dp_drrs_init()
6122 		DRM_DEBUG_KMS("using pipe %c for initial backlight setup\n",  in intel_edp_init_connector()
6153 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,  in intel_dp_modeset_retry_work_fn()
6225 	DRM_DEBUG_KMS("Adding %s connector on port %c\n",  in intel_dp_init_connector()
6268 			DRM_DEBUG_KMS("HDCP init failed, skipping.\n");  in intel_dp_init_connector()