Lines Matching refs:DP
530 uint32_t DP; in vlv_power_sequencer_kick() local
543 DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in vlv_power_sequencer_kick()
544 DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in vlv_power_sequencer_kick()
545 DP |= DP_PORT_WIDTH(1); in vlv_power_sequencer_kick()
546 DP |= DP_LINK_TRAIN_PAT_1; in vlv_power_sequencer_kick()
549 DP |= DP_PIPE_SEL_CHV(pipe); in vlv_power_sequencer_kick()
551 DP |= DP_PIPE_SEL(pipe); in vlv_power_sequencer_kick()
577 I915_WRITE(intel_dp->output_reg, DP); in vlv_power_sequencer_kick()
580 I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN); in vlv_power_sequencer_kick()
583 I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); in vlv_power_sequencer_kick()
1968 intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in intel_dp_prepare()
1971 intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in intel_dp_prepare()
1972 intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count); in intel_dp_prepare()
1978 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
1980 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
1981 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
1984 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
1986 intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe); in intel_dp_prepare()
1990 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
2000 intel_dp->DP |= DP_COLOR_RANGE_16_235; in intel_dp_prepare()
2003 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
2005 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
2006 intel_dp->DP |= DP_LINK_TRAIN_OFF; in intel_dp_prepare()
2009 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
2012 intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe); in intel_dp_prepare()
2014 intel_dp->DP |= DP_PIPE_SEL(crtc->pipe); in intel_dp_prepare()
2536 intel_dp->DP &= ~DP_PLL_FREQ_MASK; in ironlake_edp_pll_on()
2539 intel_dp->DP |= DP_PLL_FREQ_162MHZ; in ironlake_edp_pll_on()
2541 intel_dp->DP |= DP_PLL_FREQ_270MHZ; in ironlake_edp_pll_on()
2543 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_on()
2556 intel_dp->DP |= DP_PLL_ENABLE; in ironlake_edp_pll_on()
2558 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_on()
2575 intel_dp->DP &= ~DP_PLL_ENABLE; in ironlake_edp_pll_off()
2577 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_off()
2864 uint32_t *DP, in _intel_dp_set_link_train() argument
2907 *DP &= ~DP_LINK_TRAIN_MASK_CPT; in _intel_dp_set_link_train()
2911 *DP |= DP_LINK_TRAIN_OFF_CPT; in _intel_dp_set_link_train()
2914 *DP |= DP_LINK_TRAIN_PAT_1_CPT; in _intel_dp_set_link_train()
2917 *DP |= DP_LINK_TRAIN_PAT_2_CPT; in _intel_dp_set_link_train()
2921 *DP |= DP_LINK_TRAIN_PAT_2_CPT; in _intel_dp_set_link_train()
2926 *DP &= ~DP_LINK_TRAIN_MASK; in _intel_dp_set_link_train()
2930 *DP |= DP_LINK_TRAIN_OFF; in _intel_dp_set_link_train()
2933 *DP |= DP_LINK_TRAIN_PAT_1; in _intel_dp_set_link_train()
2936 *DP |= DP_LINK_TRAIN_PAT_2; in _intel_dp_set_link_train()
2940 *DP |= DP_LINK_TRAIN_PAT_2; in _intel_dp_set_link_train()
2961 intel_dp->DP |= DP_PORT_EN; in intel_dp_enable_port()
2963 intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; in intel_dp_enable_port()
2965 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_enable_port()
3572 intel_dp->DP = (intel_dp->DP & ~mask) | signal_levels; in intel_dp_set_signal_levels()
3574 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_set_signal_levels()
3586 _intel_dp_set_link_train(intel_dp, &intel_dp->DP, dp_train_pat); in intel_dp_program_link_training_pattern()
3588 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_program_link_training_pattern()
3632 uint32_t DP = intel_dp->DP; in intel_dp_link_down() local
3644 DP &= ~DP_LINK_TRAIN_MASK_CPT; in intel_dp_link_down()
3645 DP |= DP_LINK_TRAIN_PAT_IDLE_CPT; in intel_dp_link_down()
3647 DP &= ~DP_LINK_TRAIN_MASK; in intel_dp_link_down()
3648 DP |= DP_LINK_TRAIN_PAT_IDLE; in intel_dp_link_down()
3650 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3653 DP &= ~(DP_PORT_EN | DP_AUDIO_OUTPUT_ENABLE); in intel_dp_link_down()
3654 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3671 DP &= ~(DP_PIPE_SEL_MASK | DP_LINK_TRAIN_MASK); in intel_dp_link_down()
3672 DP |= DP_PORT_EN | DP_PIPE_SEL(PIPE_A) | in intel_dp_link_down()
3674 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3677 DP &= ~DP_PORT_EN; in intel_dp_link_down()
3678 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3688 intel_dp->DP = DP; in intel_dp_link_down()
5219 intel_dp->DP = I915_READ(intel_dp->output_reg); in intel_dp_encoder_reset()
6200 intel_dp->DP = I915_READ(intel_dp->output_reg); in intel_dp_init_connector()