6464 					   pipe_config->pipe_bpp);  in ironlake_fdi_compute_config()
6468 	intel_link_compute_m_n(pipe_config->pipe_bpp, lane, fdi_dotclock,  in ironlake_fdi_compute_config()
6472 	if (ret == -EINVAL && pipe_config->pipe_bpp > 6*3) {  in ironlake_fdi_compute_config()
6473 		pipe_config->pipe_bpp -= 2*3;  in ironlake_fdi_compute_config()
6475 			      pipe_config->pipe_bpp);  in ironlake_fdi_compute_config()
6500 	if (crtc_state->pipe_bpp > 24)  in hsw_crtc_state_ips_capable()
7436 		if (intel_crtc->config->dither && intel_crtc->config->pipe_bpp != 30)  in i9xx_set_pipeconf()
7440 		switch (intel_crtc->config->pipe_bpp) {  in i9xx_set_pipeconf()
7851 			pipe_config->pipe_bpp = 18;  in i9xx_get_pipe_config()
7854 			pipe_config->pipe_bpp = 24;  in i9xx_get_pipe_config()
7857 			pipe_config->pipe_bpp = 30;  in i9xx_get_pipe_config()
8378 	switch (intel_crtc->config->pipe_bpp) {  in ironlake_set_pipeconf()
8439 		switch (intel_crtc->config->pipe_bpp) {  in haswell_set_pipemisc()
8898 		pipe_config->pipe_bpp = 18;  in ironlake_get_pipe_config()
8901 		pipe_config->pipe_bpp = 24;  in ironlake_get_pipe_config()
8904 		pipe_config->pipe_bpp = 30;  in ironlake_get_pipe_config()
8907 		pipe_config->pipe_bpp = 36;  in ironlake_get_pipe_config()
10767 	int bpp = pipe_config->pipe_bpp;  in connected_sink_compute_bpp()
10777 		pipe_config->pipe_bpp = info->bpc * 3;  in connected_sink_compute_bpp()
10784 		pipe_config->pipe_bpp = 24;  in connected_sink_compute_bpp()
10807 	pipe_config->pipe_bpp = bpp;  in compute_baseline_pipe_bpp()
10911 		      pipe_config->pipe_bpp, pipe_config->dither);  in intel_dump_pipe_config()
11223 	pipe_config->dither = (pipe_config->pipe_bpp == 6*3) &&  in intel_modeset_pipe_config()
11226 		      base_bpp, pipe_config->pipe_bpp, pipe_config->dither);  in intel_modeset_pipe_config()
11583 		PIPE_CONF_CHECK_I(pipe_bpp);  in intel_pipe_config_compare()