Lines Matching refs:intel_state
2800 struct intel_plane_state *intel_state = in intel_find_initial_plane_obj() local
2851 intel_state->vma = in intel_find_initial_plane_obj()
2854 intel_plane_uses_fence(intel_state), in intel_find_initial_plane_obj()
2855 &intel_state->flags); in intel_find_initial_plane_obj()
2857 if (IS_ERR(intel_state->vma)) { in intel_find_initial_plane_obj()
2859 intel_crtc->pipe, PTR_ERR(intel_state->vma)); in intel_find_initial_plane_obj()
2861 intel_state->vma = NULL; in intel_find_initial_plane_obj()
2879 intel_state->base.src = drm_plane_state_src(plane_state); in intel_find_initial_plane_obj()
2880 intel_state->base.dst = drm_plane_state_dest(plane_state); in intel_find_initial_plane_obj()
6521 struct intel_atomic_state *intel_state = in hsw_compute_ips_config() local
6536 crtc_state->pixel_rate > intel_state->cdclk.logical.cdclk * 95 / 100) in hsw_compute_ips_config()
12206 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in intel_modeset_checks() local
12217 intel_state->modeset = true; in intel_modeset_checks()
12218 intel_state->active_crtcs = dev_priv->active_crtcs; in intel_modeset_checks()
12219 intel_state->cdclk.logical = dev_priv->cdclk.logical; in intel_modeset_checks()
12220 intel_state->cdclk.actual = dev_priv->cdclk.actual; in intel_modeset_checks()
12224 intel_state->active_crtcs |= 1 << i; in intel_modeset_checks()
12226 intel_state->active_crtcs &= ~(1 << i); in intel_modeset_checks()
12229 intel_state->active_pipe_changes |= drm_crtc_mask(crtc); in intel_modeset_checks()
12250 &intel_state->cdclk.logical)) { in intel_modeset_checks()
12258 &intel_state->cdclk.actual)) { in intel_modeset_checks()
12265 intel_state->cdclk.logical.cdclk, in intel_modeset_checks()
12266 intel_state->cdclk.actual.cdclk); in intel_modeset_checks()
12268 intel_state->cdclk.logical.voltage_level, in intel_modeset_checks()
12269 intel_state->cdclk.actual.voltage_level); in intel_modeset_checks()
12308 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in intel_atomic_check() local
12367 intel_state->cdclk.logical = dev_priv->cdclk.logical; in intel_atomic_check()
12374 intel_fbc_choose_crtc(dev_priv, intel_state); in intel_atomic_check()
12443 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in skl_update_crtcs() local
12453 u8 required_slices = intel_state->wm_results.ddb.enabled_slices; in skl_update_crtcs()
12504 intel_state->wm_results.dirty_pipes != updated) in skl_update_crtcs()
12540 static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_state) in intel_atomic_commit_fence_wait() argument
12543 struct drm_i915_private *dev_priv = to_i915(intel_state->base.dev); in intel_atomic_commit_fence_wait()
12548 prepare_to_wait(&intel_state->commit_ready.wait, in intel_atomic_commit_fence_wait()
12554 if (i915_sw_fence_done(&intel_state->commit_ready) in intel_atomic_commit_fence_wait()
12560 finish_wait(&intel_state->commit_ready.wait, &wait_fence); in intel_atomic_commit_fence_wait()
12580 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in intel_atomic_commit_tail() local
12588 intel_atomic_commit_fence_wait(intel_state); in intel_atomic_commit_tail()
12592 if (intel_state->modeset) in intel_atomic_commit_tail()
12641 dev_priv->display.initial_watermarks(intel_state, in intel_atomic_commit_tail()
12651 if (intel_state->modeset) { in intel_atomic_commit_tail()
12705 dev_priv->display.optimize_watermarks(intel_state, in intel_atomic_commit_tail()
12718 if (intel_state->modeset) in intel_atomic_commit_tail()
12719 intel_verify_planes(intel_state); in intel_atomic_commit_tail()
12721 if (intel_state->modeset && intel_can_enable_sagv(state)) in intel_atomic_commit_tail()
12726 if (intel_state->modeset) { in intel_atomic_commit_tail()
12810 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in intel_atomic_commit() local
12815 i915_sw_fence_init(&intel_state->commit_ready, in intel_atomic_commit()
12840 for_each_new_intel_crtc_in_state(intel_state, crtc, new_crtc_state, i) in intel_atomic_commit()
12849 i915_sw_fence_commit(&intel_state->commit_ready); in intel_atomic_commit()
12858 i915_sw_fence_commit(&intel_state->commit_ready); in intel_atomic_commit()
12867 if (intel_state->modeset) { in intel_atomic_commit()
12868 memcpy(dev_priv->min_cdclk, intel_state->min_cdclk, in intel_atomic_commit()
12869 sizeof(intel_state->min_cdclk)); in intel_atomic_commit()
12871 intel_state->min_voltage_level, in intel_atomic_commit()
12872 sizeof(intel_state->min_voltage_level)); in intel_atomic_commit()
12873 dev_priv->active_crtcs = intel_state->active_crtcs; in intel_atomic_commit()
12874 dev_priv->cdclk.logical = intel_state->cdclk.logical; in intel_atomic_commit()
12875 dev_priv->cdclk.actual = intel_state->cdclk.actual; in intel_atomic_commit()
12881 i915_sw_fence_commit(&intel_state->commit_ready); in intel_atomic_commit()
12882 if (nonblock && intel_state->modeset) { in intel_atomic_commit()
12887 if (intel_state->modeset) in intel_atomic_commit()
13026 struct intel_atomic_state *intel_state = in intel_prepare_plane_fb() local
13051 ret = i915_sw_fence_await_reservation(&intel_state->commit_ready, in intel_prepare_plane_fb()
13061 ret = i915_sw_fence_await_dma_fence(&intel_state->commit_ready, in intel_prepare_plane_fb()
13096 ret = i915_sw_fence_await_reservation(&intel_state->commit_ready, in intel_prepare_plane_fb()
13120 if (!intel_state->rps_interactive) { in intel_prepare_plane_fb()
13122 intel_state->rps_interactive = true; in intel_prepare_plane_fb()
13141 struct intel_atomic_state *intel_state = in intel_cleanup_plane_fb() local
13145 if (intel_state->rps_interactive) { in intel_cleanup_plane_fb()
13147 intel_state->rps_interactive = false; in intel_cleanup_plane_fb()
14653 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in intel_atomic_state_free() local
14657 i915_sw_fence_fini(&intel_state->commit_ready); in intel_atomic_state_free()
15047 struct intel_atomic_state *intel_state; in sanitize_watermarks() local
15076 intel_state = to_intel_atomic_state(state); in sanitize_watermarks()
15084 intel_state->skip_intermediate_wm = true; in sanitize_watermarks()
15108 dev_priv->display.optimize_watermarks(intel_state, cs); in sanitize_watermarks()