Lines Matching refs:i9xx_plane
3316 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_update_plane() local
3319 i915_reg_t reg = DSPCNTR(i9xx_plane); in i9xx_update_plane()
3338 I915_WRITE_FW(DSPSIZE(i9xx_plane), in i9xx_update_plane()
3341 I915_WRITE_FW(DSPPOS(i9xx_plane), 0); in i9xx_update_plane()
3342 } else if (IS_CHERRYVIEW(dev_priv) && i9xx_plane == PLANE_B) { in i9xx_update_plane()
3343 I915_WRITE_FW(PRIMSIZE(i9xx_plane), in i9xx_update_plane()
3346 I915_WRITE_FW(PRIMPOS(i9xx_plane), 0); in i9xx_update_plane()
3347 I915_WRITE_FW(PRIMCNSTALPHA(i9xx_plane), 0); in i9xx_update_plane()
3352 I915_WRITE_FW(DSPSTRIDE(i9xx_plane), fb->pitches[0]); in i9xx_update_plane()
3354 I915_WRITE_FW(DSPSURF(i9xx_plane), in i9xx_update_plane()
3357 I915_WRITE_FW(DSPOFFSET(i9xx_plane), (y << 16) | x); in i9xx_update_plane()
3359 I915_WRITE_FW(DSPSURF(i9xx_plane), in i9xx_update_plane()
3362 I915_WRITE_FW(DSPTILEOFF(i9xx_plane), (y << 16) | x); in i9xx_update_plane()
3363 I915_WRITE_FW(DSPLINOFF(i9xx_plane), linear_offset); in i9xx_update_plane()
3365 I915_WRITE_FW(DSPADDR(i9xx_plane), in i9xx_update_plane()
3378 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_disable_plane() local
3383 I915_WRITE_FW(DSPCNTR(i9xx_plane), 0); in i9xx_disable_plane()
3385 I915_WRITE_FW(DSPSURF(i9xx_plane), 0); in i9xx_disable_plane()
3387 I915_WRITE_FW(DSPADDR(i9xx_plane), 0); in i9xx_disable_plane()
3388 POSTING_READ_FW(DSPCNTR(i9xx_plane)); in i9xx_disable_plane()
3398 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_plane_get_hw_state() local
3411 val = I915_READ(DSPCNTR(i9xx_plane)); in i9xx_plane_get_hw_state()
7723 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_get_initial_plane_config() local
7746 val = I915_READ(DSPCNTR(i9xx_plane)); in i9xx_get_initial_plane_config()
7760 offset = I915_READ(DSPOFFSET(i9xx_plane)); in i9xx_get_initial_plane_config()
7761 base = I915_READ(DSPSURF(i9xx_plane)) & 0xfffff000; in i9xx_get_initial_plane_config()
7764 offset = I915_READ(DSPTILEOFF(i9xx_plane)); in i9xx_get_initial_plane_config()
7766 offset = I915_READ(DSPLINOFF(i9xx_plane)); in i9xx_get_initial_plane_config()
7767 base = I915_READ(DSPSURF(i9xx_plane)) & 0xfffff000; in i9xx_get_initial_plane_config()
7769 base = I915_READ(DSPADDR(i9xx_plane)); in i9xx_get_initial_plane_config()
7777 val = I915_READ(DSPSTRIDE(i9xx_plane)); in i9xx_get_initial_plane_config()
13597 enum i9xx_plane_id i9xx_plane) in i9xx_plane_has_fbc() argument
13603 return i9xx_plane == PLANE_A; /* tied to pipe A */ in i9xx_plane_has_fbc()
13605 return i9xx_plane == PLANE_A || i9xx_plane == PLANE_B || in i9xx_plane_has_fbc()
13606 i9xx_plane == PLANE_C; in i9xx_plane_has_fbc()
13608 return i9xx_plane == PLANE_A || i9xx_plane == PLANE_B; in i9xx_plane_has_fbc()
13610 return i9xx_plane == PLANE_A; in i9xx_plane_has_fbc()
13684 primary->i9xx_plane = (enum i9xx_plane_id) !pipe; in intel_primary_plane_create()
13686 primary->i9xx_plane = (enum i9xx_plane_id) pipe; in intel_primary_plane_create()
13696 primary->i9xx_plane); in intel_primary_plane_create()
13771 plane_name(primary->i9xx_plane)); in intel_primary_plane_create()
13845 cursor->i9xx_plane = (enum i9xx_plane_id) pipe; in intel_cursor_plane_create()
13982 enum i9xx_plane_id i9xx_plane = primary->i9xx_plane; in intel_crtc_init() local
13984 BUG_ON(i9xx_plane >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) || in intel_crtc_init()
13985 dev_priv->plane_to_crtc_mapping[i9xx_plane] != NULL); in intel_crtc_init()
13986 dev_priv->plane_to_crtc_mapping[i9xx_plane] = intel_crtc; in intel_crtc_init()