1471 	if (pipe != PIPE_A) {  in chv_enable_pll()
1578 		I915_WRITE(DPLL(PIPE_A),  in i9xx_disable_pll()
1579 			   I915_READ(DPLL(PIPE_A)) & ~DPLL_DVO_2X_MODE);  in i9xx_disable_pll()
1602 	if (pipe != PIPE_A)  in vlv_disable_pll()
1619 	if (pipe != PIPE_A)  in chv_disable_pll()
1733 	assert_fdi_rx_enabled(dev_priv, PIPE_A);  in lpt_enable_pch_transcoder()
1736 	val = I915_READ(TRANS_CHICKEN2(PIPE_A));  in lpt_enable_pch_transcoder()
1738 	I915_WRITE(TRANS_CHICKEN2(PIPE_A), val);  in lpt_enable_pch_transcoder()
1804 	val = I915_READ(TRANS_CHICKEN2(PIPE_A));  in lpt_disable_pch_transcoder()
1806 	I915_WRITE(TRANS_CHICKEN2(PIPE_A), val);  in lpt_disable_pch_transcoder()
1814 		return PIPE_A;  in intel_crtc_pch_transcoder()
4585 	case PIPE_A:  in ivybridge_update_fdi_bc_bifurcation()
4731 	assert_pch_transcoder_disabled(dev_priv, PIPE_A);  in lpt_pch_enable()
4736 	ironlake_pch_transcoder_set_timings(crtc, PIPE_A);  in lpt_pch_enable()
5598 	return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A;  in hsw_crtc_supports_ips()
6401 	case PIPE_A:  in ironlake_check_fdi_lanes()
6548 		(crtc->pipe == PIPE_A || IS_I915G(dev_priv));  in intel_crtc_supports_double_wide()
6872 	if (crtc->pipe != PIPE_A)  in vlv_compute_dpll()
6889 	if (crtc->pipe != PIPE_A)  in chv_compute_dpll()
6973 		if (pipe == PIPE_A)  in vlv_prepare_pll()
6981 		if (pipe == PIPE_A)  in vlv_prepare_pll()
7878 		if (IS_CHERRYVIEW(dev_priv) && crtc->pipe != PIPE_A)  in i9xx_get_pipe_config()
9370 			trans_edp_pipe = PIPE_A;  in hsw_get_transcoder_state()
9480 		tmp = I915_READ(FDI_RX_CTL(PIPE_A));  in haswell_get_ddi_port_state()
9765 		I915_WRITE_FW(CURCNTR(PIPE_A), 0);  in i845_update_cursor()
9766 		I915_WRITE_FW(CURBASE(PIPE_A), base);  in i845_update_cursor()
9768 		I915_WRITE_FW(CURPOS(PIPE_A), pos);  in i845_update_cursor()
9769 		I915_WRITE_FW(CURCNTR(PIPE_A), cntl);  in i845_update_cursor()
9775 		I915_WRITE_FW(CURPOS(PIPE_A), pos);  in i845_update_cursor()
9778 	POSTING_READ_FW(CURCNTR(PIPE_A));  in i845_update_cursor()
9796 	power_domain = POWER_DOMAIN_PIPE(PIPE_A);  in i845_cursor_get_hw_state()
9800 	ret = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE;  in i845_cursor_get_hw_state()
9802 	*pipe = PIPE_A;  in i845_cursor_get_hw_state()
13619 	return pipe == PIPE_A && plane_id == PLANE_PRIMARY;  in skl_plane_has_fbc()
15356 	WARN_ON(I915_READ(CURCNTR(PIPE_A)) & MCURSOR_MODE);  in i830_disable_pipe()
15426 		(HAS_PCH_LPT_H(dev_priv) && pch_transcoder == PIPE_A);  in has_pch_trancoder()