Lines Matching refs:PIPECONF_ENABLE
1273 cur_state = !!(val & PIPECONF_ENABLE); in assert_pipe()
1855 if (val & PIPECONF_ENABLE) { in intel_enable_pipe()
1861 I915_WRITE(reg, val | PIPECONF_ENABLE); in intel_enable_pipe()
1894 if ((val & PIPECONF_ENABLE) == 0) in intel_disable_pipe()
1906 val &= ~PIPECONF_ENABLE; in intel_disable_pipe()
1909 if ((val & PIPECONF_ENABLE) == 0) in intel_disable_pipe()
7427 pipeconf |= I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE; in i9xx_set_pipeconf()
7844 if (!(tmp & PIPECONF_ENABLE)) in i9xx_get_pipe_config()
8893 if (!(tmp & PIPECONF_ENABLE)) in ironlake_get_pipe_config()
9391 return tmp & PIPECONF_ENABLE; in hsw_get_transcoder_state()
15340 I915_WRITE(PIPECONF(pipe), PIPECONF_ENABLE | PIPECONF_PROGRESSIVE); in i830_enable_pipe()