Lines Matching refs:IS_VALLEYVIEW
223 if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))) in intel_update_czclk()
622 if (!IS_PINEVIEW(dev_priv) && !IS_VALLEYVIEW(dev_priv) && in intel_PLL_is_valid()
627 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && in intel_PLL_is_valid()
1234 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in assert_panel_unlocked()
2037 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_linear_alignment()
6147 else if (IS_VALLEYVIEW(dev_priv)) in i9xx_crtc_disable()
7433 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_set_pipeconf()
7465 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_set_pipeconf()
7847 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_get_pipe_config()
7864 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_get_pipe_config()
7899 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { in i9xx_get_pipe_config()
7919 else if (IS_VALLEYVIEW(dev_priv)) in i9xx_get_pipe_config()
10798 if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in compute_baseline_pipe_bpp()
11083 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in clear_intel_crtc_state()
11097 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in clear_intel_crtc_state()
11500 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pipe_config_compare()
14104 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_unlock_regs_wa()
14121 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_init()
14225 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_setup_outputs()
14517 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && in intel_framebuffer_init()
14534 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { in intel_framebuffer_init()
14783 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_init_display_hooks()
15835 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_modeset_setup_hw_state()