1111 	val = I915_READ(DPLL(pipe));  in assert_pll()
1394 	I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll);  in _vlv_enable_pll()
1395 	POSTING_READ(DPLL(pipe));  in _vlv_enable_pll()
1399 				    DPLL(pipe),  in _vlv_enable_pll()
1448 	I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll);  in _chv_enable_pll()
1452 				    DPLL(pipe), DPLL_LOCK_VLV, DPLL_LOCK_VLV,  in _chv_enable_pll()
1487 		WARN_ON((I915_READ(DPLL(PIPE_B)) & DPLL_VGA_MODE_DIS) == 0);  in chv_enable_pll()
1511 	i915_reg_t reg = DPLL(crtc->pipe);  in i9xx_enable_pll()
1530 		I915_WRITE(DPLL(!crtc->pipe),  in i9xx_enable_pll()
1531 			   I915_READ(DPLL(!crtc->pipe)) | DPLL_DVO_2X_MODE);  in i9xx_enable_pll()
1576 		I915_WRITE(DPLL(PIPE_B),  in i9xx_disable_pll()
1577 			   I915_READ(DPLL(PIPE_B)) & ~DPLL_DVO_2X_MODE);  in i9xx_disable_pll()
1578 		I915_WRITE(DPLL(PIPE_A),  in i9xx_disable_pll()
1579 			   I915_READ(DPLL(PIPE_A)) & ~DPLL_DVO_2X_MODE);  in i9xx_disable_pll()
1589 	I915_WRITE(DPLL(pipe), DPLL_VGA_MODE_DIS);  in i9xx_disable_pll()
1590 	POSTING_READ(DPLL(pipe));  in i9xx_disable_pll()
1605 	I915_WRITE(DPLL(pipe), val);  in vlv_disable_pll()
1606 	POSTING_READ(DPLL(pipe));  in vlv_disable_pll()
1622 	I915_WRITE(DPLL(pipe), val);  in chv_disable_pll()
1623 	POSTING_READ(DPLL(pipe));  in chv_disable_pll()
1645 		dpll_reg = DPLL(0);  in vlv_wait_port_ready()
1649 		dpll_reg = DPLL(0);  in vlv_wait_port_ready()
6911 	I915_WRITE(DPLL(pipe),  in vlv_prepare_pll()
7012 	I915_WRITE(DPLL(pipe),  in chv_prepare_pll()
7888 		tmp = I915_READ(DPLL(crtc->pipe));  in i9xx_get_pipe_config()
7898 	pipe_config->dpll_hw_state.dpll = I915_READ(DPLL(crtc->pipe));  in i9xx_get_pipe_config()
15296 	dpll = (I915_READ(DPLL(pipe)) & DPLL_DVO_2X_MODE) |  in i830_enable_pipe()
15319 	I915_WRITE(DPLL(pipe), dpll & ~DPLL_VGA_MODE_DIS);  in i830_enable_pipe()
15320 	I915_WRITE(DPLL(pipe), dpll);  in i830_enable_pipe()
15323 	POSTING_READ(DPLL(pipe));  in i830_enable_pipe()
15331 	I915_WRITE(DPLL(pipe), dpll);  in i830_enable_pipe()
15335 		I915_WRITE(DPLL(pipe), dpll);  in i830_enable_pipe()
15336 		POSTING_READ(DPLL(pipe));  in i830_enable_pipe()
15364 	I915_WRITE(DPLL(pipe), DPLL_VGA_MODE_DIS);  in i830_disable_pipe()
15365 	POSTING_READ(DPLL(pipe));  in i830_disable_pipe()