Lines Matching refs:DP_TP_CTL
1152 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
1215 temp = I915_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
1218 I915_WRITE(DP_TP_CTL(PORT_E), temp); in hsw_fdi_link_train()
1219 POSTING_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
1232 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
2795 val = I915_READ(DP_TP_CTL(port)); in intel_disable_ddi_buf()
2798 I915_WRITE(DP_TP_CTL(port), val); in intel_disable_ddi_buf()
3082 if (I915_READ(DP_TP_CTL(port)) & DP_TP_CTL_ENABLE) { in intel_ddi_prepare_link_retrain()
3090 val = I915_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()
3093 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_prepare_link_retrain()
3094 POSTING_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()
3109 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_prepare_link_retrain()
3110 POSTING_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()