Lines Matching refs:DDI_BUF_CTL
1030 i915_reg_t reg = DDI_BUF_CTL(port); in intel_wait_ddi_buf_idle()
1162 I915_WRITE(DDI_BUF_CTL(PORT_E), in hsw_fdi_link_train()
1166 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
1209 temp = I915_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
1211 I915_WRITE(DDI_BUF_CTL(PORT_E), temp); in hsw_fdi_link_train()
1212 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
1940 tmp = I915_READ(DDI_BUF_CTL(port)); in intel_ddi_get_hw_state()
2788 val = I915_READ(DDI_BUF_CTL(port)); in intel_disable_ddi_buf()
2791 I915_WRITE(DDI_BUF_CTL(port), val); in intel_disable_ddi_buf()
2997 I915_WRITE(DDI_BUF_CTL(port), in intel_enable_ddi_hdmi()
3083 val = I915_READ(DDI_BUF_CTL(port)); in intel_ddi_prepare_link_retrain()
3086 I915_WRITE(DDI_BUF_CTL(port), val); in intel_ddi_prepare_link_retrain()
3113 I915_WRITE(DDI_BUF_CTL(port), intel_dp->DP); in intel_ddi_prepare_link_retrain()
3114 POSTING_READ(DDI_BUF_CTL(port)); in intel_ddi_prepare_link_retrain()
3314 intel_dig_port->dp.output_reg = DDI_BUF_CTL(port); in intel_ddi_init_dp_connector()
3477 intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port); in intel_ddi_init_hdmi_connector()
3522 if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) in intel_ddi_max_lanes()
3603 intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & in intel_ddi_init()
3606 intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & in intel_ddi_init()