53 	i915_reg_t adpa_reg;  member
67 			    i915_reg_t adpa_reg, enum pipe *pipe)  in intel_crt_port_enabled()  argument
71 	val = I915_READ(adpa_reg);  in intel_crt_port_enabled()
93 	ret = intel_crt_port_enabled(dev_priv, crt->adpa_reg, pipe);  in intel_crt_get_hw_state()
106 	tmp = I915_READ(crt->adpa_reg);  in intel_crt_get_flags()
195 	I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_set_dpms()
424 		save_adpa = adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
431 		I915_WRITE(crt->adpa_reg, adpa);  in intel_ironlake_crt_detect_hotplug()
434 					    crt->adpa_reg,  in intel_ironlake_crt_detect_hotplug()
440 			I915_WRITE(crt->adpa_reg, save_adpa);  in intel_ironlake_crt_detect_hotplug()
441 			POSTING_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
446 	adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
480 	save_adpa = adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
485 	I915_WRITE(crt->adpa_reg, adpa);  in valleyview_crt_detect_hotplug()
488 				    crt->adpa_reg,  in valleyview_crt_detect_hotplug()
492 		I915_WRITE(crt->adpa_reg, save_adpa);  in valleyview_crt_detect_hotplug()
496 	adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
892 		adpa = I915_READ(crt->adpa_reg);  in intel_crt_reset()
895 		I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_reset()
896 		POSTING_READ(crt->adpa_reg);  in intel_crt_reset()
933 	i915_reg_t adpa_reg;  in intel_crt_init()  local
937 		adpa_reg = PCH_ADPA;  in intel_crt_init()
939 		adpa_reg = VLV_ADPA;  in intel_crt_init()
941 		adpa_reg = ADPA;  in intel_crt_init()
943 	adpa = I915_READ(adpa_reg);  in intel_crt_init()
953 		I915_WRITE(adpa_reg, adpa | ADPA_DAC_ENABLE |  in intel_crt_init()
955 		if ((I915_READ(adpa_reg) & ADPA_DAC_ENABLE) == 0)  in intel_crt_init()
957 		I915_WRITE(adpa_reg, adpa);  in intel_crt_init()
993 	crt->adpa_reg = adpa_reg;  in intel_crt_init()